W_Hsc_Flg High-Speed Counter Flag Control Fb - Fuji Electric MICREX-SX Series User Manual

Section 3 Programming

(3) W_HSC_FLG High-speed counter flag control FB

1) FB format
Expert
W_HSC_FLG
EN
HSC_POS
MASK
CLR
DIR
Parameter Name
EN Control request
HSC_POS Counter selection
MASK Enable/disable
CLR Current value clear
DIR Direction signal
Q Control enable
ERROR Control enable error BOOL
2) Memory to be used
User FB instance memory: 2 words
Program step: 2 steps
3) Operation specifications
• When "EN" is ON at the execution of this instruction, the status of the high-speed counter control flag that is connected to the
terminal is reflected to the high-speed counter selected by "HSC_POS".
When using the special relay (count enable/disable flag, current value clear flag, direction signal [by software]) instead of this
instruction to control the high-speed counter, the status is reflected to the high-speed counter at the end of the scan.
The table below shows the timing of reflection of each control signal to the high-speed counter.
Control signal type
MASK, CLR, DIR signal set to input (Xo)
MASK, CLR, DIR signal of special relay
Internal device specified as MASK, CLR, DIR of this instruction
• When using MASK or CLR signal in both an input (Xo) and this signal (or special relay), the reflection to the high-speed
counter is executed by the "OR logic" of these signals.
• DIR is enabled only in "Command pulse (A-phase) + Sign pulse (B-phase) (Application control)" mode. In other modes,
specify "always OFF" signal for DIR.
• If the setting of HSC_POS is out of the range or a channel that is not set in the parameter is specified, "ERROR" is turned ON
and "Q" is turned OFF.
Standard
W_HSC_FLG
V1 (EN)
Q
WV2 (HSC_POS)
ERROR
V3 (MASK)
V4 (CLR)
V5 (DIR)
Data type I/O
BOOL VAR_INPUT
UINT VAR_INPUT
BOOL VAR_INPUT
BOOL VAR_INPUT
BOOL VAR_INPUT
BOOL VAR_OUTPUT Turned ON when the control is enabled.
VAR_OUTPUT Turned ON when the control is disabled due to a CH
(Q) V6
(ERROR) V7
Description
When this signal is ON at the execution of the instruction, the
writing to the high-speed control flag is executed.
Specify the channel of the high-speed counter.
0: C0 to 7: CH7
Enable or disable the count.
OFF: Count enable, OFF: Count disable
Specify an arbitrary bit address to command the counter
current value clear.
ON: Current value clear
Specify the direction signal of the counter.
OFF: Forward, ON: Reverse
specification error, etc.
Timing of reflection to high-speed counter
When the input is ON
At the end of the scan
When this instruction is executed
3-6