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Epson S5U13700B00C User Manual

Epson S5U13700B00C User Manual

S1d13700 embedded memory graphics lcd controller
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S1D13700 Embedded Memory Graphics LCD Controller
S5U13700B00C Rev. 1.0
Evaluation Board User Manual
Document Number: X42A-G-002-01.1
I
Rev. 1.1

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Summary of Contents for Epson S5U13700B00C

  • Page 1 S1D13700 Embedded Memory Graphics LCD Controller S5U13700B00C Rev. 1.0 Evaluation Board User Manual Document Number: X42A-G-002-01.1 Rev. 1.1...
  • Page 2 This evaluation board/kit or development tool is intended for use by an electronics engineer and is not a consumer product. The user should use it properly and in a safe manner. Seiko Epson does not assume any responsibility or liability of any kind of damage and/or fire caused by the use of it.

  • Page 3: Table Of Contents

    Schematic Diagrams ........23 S5U13700B00C Board Layout ......26 Connecting the S5U13700B00C to the PC Card Adapter .
  • Page 4 Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 5: Introduction

    Introduction 1 Introduction This manual describes the setup and operation of the S5U13700B00C Rev. 1.0 Evaluation Board. This evaluation board is designed as an evaluation platform for the S1D13700 Embedded Memory Graphics LCD Controller. The S5U13700B00C is designed for connection to the Epson PC Card Extender (S5UPCMCIAB00C), thus providing an easy connection to a laptop or a desktop computer with a PC Card reader.

  • Page 6: Features

    The S5U13700B00C Rev. 1.0 evaluation board includes the following features: • 64-pin TQFP13 S1D13700F0x Embedded Memory Graphics LCD Controller • Headers for connecting to various Host Bus Interfaces or to the Epson PC Card Extender • 0.1x0.1” header with all the LCD interface signals allowing connection to a LCD panel •...

  • Page 7: Installation And Configuration

    Installation and Configuration 3 Installation and Configuration The S5U13700B00C evaluation board incorporates a DIP switch and 9 jumpers, which allow configuration of the board. 3.1 Configuration DIP Switches An 8 position DIP switch (S1) is used to configure the S1D13700 for different Host Bus interfaces and to select the FPSHIFT cycle time.
  • Page 8 Selects the FPSHIFT cycle time (FPSHIFT:Clock Input) as follows: CNF1 CNF0 FPSHIFT Cycle Time FPSHIFT Divide 4:1 S1-[2:1] CNF[1:0] FPSHIFT Divide 8:1 FPSHIFT Divide 16:1 Reserved = Required settings when using the PC Card adapter Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 9: Configuration Jumpers

    Installation and Configuration 3.2 Configuration Jumpers The S5U13700B00C has 9 jumper blocks which allow the configuration of the board. Table 3-2: Jumper Summary Jumper Function Position 1-2 Position 2-3 No Jumper HIOVDD current HIOVDD Normal — measurement NIOVDD current NIOVDD Normal —...
  • Page 10 When no jumper is installed, host interface current consumption can be measured across JP1. Note The HIOVDD voltage can be selected to be +3.3V or +5V using jumper JP7. HIOVDD current Normal Operation measurement Top View Figure 3-2: Configuration Jumper JP1 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 11 When no jumper is installed, panel interface current consumption can be measured across JP2. Note The NIOVDD voltage can be selected to be +3.3V or +5V using jumper JP8. NIOVDD current Normal Operation measurement Top View Figure 3-3: Configuration Jumper JP2 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 12 When the jumper is at position 1-2, normal operation is selected. When no jumper is installed, core current consumption can be measured across JP3. Normal Operation COREVDD current measurement Top View Figure 3-4: Configuration Jumper JP3 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 13 When the jumper is at position 2-3, the clock source is from the host interface connector (connector P1, pin 4). On-board oscillator Host interface (U2) connector Top View Figure 3-5: Configuration Jumper JP4 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 14 When jumper JP5 is at position 1-2, jumper JP6 must also be at position 1-2. When jumper JP5 is at position 2-3, jumper JP6 must also be at position 2-3. Disable XCG1input Disable CLKI input Top View Figure 3-6: Configuration Jumper JP5 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 15 When jumper JP6 is at position 1-2, jumper JP5 must also be at position 1-2. When jumper JP6 is at position 2-3, jumper JP5 must also be at position 2-3. Enable XCD1 output Disable XCD1 output Top View Figure 3-7: Configuration Jumper JP6 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 16 JP8 is used to select the voltage for NIOVDD. When the jumper is at position 1-2, NIOVDD is +3.3V. When the jumper is at position 2-3, NIOVDD is +5V. +3.3V Top View Figure 3-9: Configuration Jumper JP8 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 17 When the jumper is at position 2-3, the S1D13700 is reset by the system (connector P1, pin 21). Manual reset Host interface reset Top View Figure 3-10: Configuration Jumper JP9 Location Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 18: Technical Description

    All host interface signals must match HIOVDD of the S1D13700. The default value for HIOVDD on the board is +3.3V, so it will work with the Epson PC Card Extender (S5UPCMCIAB00C). HIOVDD can be selected between +3.3V and +5V using jumper JP7.
  • Page 19 Diagrams” on page 23). Note 1. When the board is connected to a PC using the Epson PC Card Extender, the signal AS# is not used and R12 must NOT be populated. AS# input of S1D13700 should be connected to HIOVDD by setting the dip switch (S1) position 6 to ON.

  • Page 20: Lcd Panel Interface

    (see “JP6 - Crystal Enable” on page 15). The default configuration of the S5U13700B00C uses a 32MHz crystal. Jumper JP5 is in position 1-2 to connect the CLKI input to ground because it is not used. Jumper JP6 is in position 1-2 to connect the XCD1 output to the crystal.

  • Page 21: Parts List

    Sullins Electronics Corp. SH4,SH5,SH6, JUMPER SHORTING TIN Shunt STC02SYAN SH7,SH8,SH9 SW TACT- ITT Industries KSC241J SWITCH TACT SILVER PLT J-TYPE SPST SWITCH DIP 8POS HALF PITCH CONFIG SW C&K TDA08H0SK1 Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 22 IC LDO REG ADJUSTBL 800MA LT1117CST Linear Technology LT1117CST SOT223 Texas Instruments IC BUFFER DUAL SHMT-TRG SOT- SN74LVC2G17 SN74LVC2G17DBVR 23-6 TPS3801K33D Texas Instruments IC 2.93V SUPPLY MON SOT-323-5 TPS3801K33DCKR Crystal32MHz_ Epson MA-306 32.0000M-C0 MA306 Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 23: Schematic Diagrams

    Schematic Diagrams 6 Schematic Diagrams Figure 6-1: S5U13700B00C Schematics (1 of 3) Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 24 Schematic Diagrams Figure 6-2: S5U13700B00C Schematics (2 of 3) Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 25 Schematic Diagrams Figure 6-3: S5U13700B00C Schematics (3 of 3) Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 26: S5U13700B00C Board Layout

    S5U13700B00C Board Layout 7 S5U13700B00C Board Layout Figure 7-1: S5U13700B00C Board Layout (Top View) Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...
  • Page 27 S5U13700B00C Board Layout Figure 7-2: S5U13700B00C Board Layout (Bottom View) Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 28: Connecting The S5U13700B00C To The Pc Card Adapter

    Connecting the S5U13700B00C to the PC Card Adapter 8 Connecting the S5U13700B00C to the PC Card Adapter S5U13700B00C Type II PC Card Slot PC Card Adapter Figure 8-1: Connecting the S5U13700B00C to the PC Card Adapter Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 29: Change Record

    9 Change Record X42A-G-002-01 Revision 1.1 - Issued: March 28, 2018 • updated Sales and Technical Support Section • updated some formatting X42A-G-002-01 Revision 1.0 • released as revision 1.0 Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board Rev. 1.1...

  • Page 30: Sales And Technical Support

    Sales and Technical Support 10 Sales and Technical Support For more information on Epson Display Controllers, visit the Epson Global website. https://global.epson.com/products_and_drivers/semicon/products/display_controllers/ For Sales and Technical Support, contact the Epson representative for your region. https://global.epson.com/products_and_drivers/semicon/information/support.html Seiko Epson Corporation S5U13700B00C Rev 1.0 Evaluation Board...

  • Page 31: Appendix A Epson Pc Card Extender

    Type II or Type III slot. The extender board includes an EEPROM containing the identifi- cation to specify it as an EPSON LCD controller. The software driver supplied by Epson will recognize this PC Card as an Epson LCD Controller.

  • Page 32: Bus Disable

    Sales and Technical Support A.4 Bus Disable Switch SW1 is used to disable the bus to the Epson Mobile Graphics Engine evaluation board. When the bus is disabled, the red LED (D2) turns “ON”. For normal operations, the bus should be enabled, with SW1 positioned towards the clock X1 location.

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