Epson S5U13706P00C100 User Manual
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Epson S5U13706P00C100 User Manual

Epson S5U13706P00C100 User Manual

S1d13706 embedded memory lcd controller
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S1D13706 Embedded Memory LCD Controller
S5U13706P00C100 Evaluation
Board User Manual
Document Number: X31B-G-021-01.2
Rev. 1.2

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Summary of Contents for Epson S5U13706P00C100

  • Page 1 S1D13706 Embedded Memory LCD Controller S5U13706P00C100 Evaluation Board User Manual Document Number: X31B-G-021-01.2 Rev. 1.2...
  • Page 2 This evaluation board/kit or development tool is intended for use by an electronics engineer and is not a consumer product. The user should use it properly and in a safe manner. Seiko Epson does not assume any responsibility or liability of any kind of damage and/or fire caused by the use of it.

  • Page 3: Table Of Contents

    11 Sales and Technical Support ......28 Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 4 Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 5: Introduction

    Introduction 1 Introduction This manual describes the setup and operation of the S5U13706P00C100 Evaluation Board. The board is designed as an evaluation platform for the S1D13706 Embedded Memory LCD Controller. This document is updated as appropriate. Please check for the latest revision of this document before beginning any development.

  • Page 6: Features

    Features 2 Features Following are some features of the S5U13706P00C100 Evaluation Board: • 100-pin TQFP S1D13706F00A Embedded Memory LCD Controller with 80K bytes of embedded SRAM. • Headers for connecting to various Host Bus Interfaces. • Configuration options. • Software adjustable backlight intensity support.

  • Page 7: Installation And Configuration

    Installation and Configuration 3 Installation and Configuration The S5U13706P00C100 is designed to support as many platforms as possible. The S5U13706P00C100 incorporates a DIP switch and three jumpers which allow both the evaluation board and S1D13706 LCD controller to be configured for a specified evaluation platform.
  • Page 8 • GPIO Pin Input Enable (REG[A9h] bit 7) must be set to 1b. • GPIO0 Pin IO Configuration (REG[A8h] bit 0) must be set to 0b. • Hardware Video Invert Enable bit (REG[70h] bit 5) must be set to 1b. Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 9: Configuration Jumpers

    HR-TFT and D-TFD panels as GPIO0 is required for both panels. For details, refer to the S1D13706 Hardware Functional Specification, document number X31B-A-001-xx. Note When configured for Sharp HR-TFT or Epson D-TFD panels, JP1 must be set to no jumper and JP6 must be set to position 2-3. GPIO0 connected GPIO0 disconnected...
  • Page 10 Position 1-2 sets the voltage level to 5.0V. Position 2-3 sets the voltage level to 3.3V (default setting). Note When configured for Sharp HR-TFT or Epson D-TFD panels, JP1 must be set to no jumper and JP6 must be set to position 2-3. 5.0V 3.3V...

  • Page 11: Cpu Interface

    If the target MC68K bus is 32-bit, then these signals should be connected to D[31:16]. These pins are not used in their corresponding Host Bus Interface mode. Systems are responsible for externally connecting them to the host interface IO V Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 12: Cpu Bus Connector Pin Mapping

    Connected to WE0# of the S1D13706 Connected to WAIT# of the S1D13706 Connected to CS# of the S1D13706 Connected to MR# of the S1D13706 Connected to WE1# of the S1D13706 Connected to TXVDD1 Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 13 +5 volt supply +5 volt supply Connected to RD/WR# of the S1D13706 Connected to BS# of the S1D13706 Connected to BUSCLK of the S1D13706 Connected to RD# of the S1D13706 Not connected Not connected Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 14: Lcd Interface Pin Mapping

    GPO on H1 can be inverted by setting JP4 to 2-3. The Sharp HR-TFT MOD signal controls the panel power. This must not be confused with the MOD signal used on many passive panels. Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 15 If REG[10h] bits 1-0 are set for either HR-TFT or D-TFD, some of the pins are used for the HR-TFT or D-TFD interfaces and are not available as GPIO pins. Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 16: Technical Description

    PCI Bridge FPGA to support the PCI bus. 6.2 Direct Host Bus Interface Support The S5U13706P00C100 is specifically designed to work using the PCI Bridge FPGA in a standard PCI bus environment. However, the S1D13706 directly supports many other host bus interfaces.

  • Page 17: Passive/Active Lcd Panel Support

    Extended LCD Connector, H2. For connection information, see Section 5, “LCD Interface Pin Mapping” on page 14. The S5U13706P00C100 does not provide a power supply for the LCD bias voltage needed by passive LCD panels. An external power supply is required to provide the bias LCD voltage to the LCD panel.

  • Page 18: Parts List

    Do not populate JP2, JP3, HEADER 3 header Shielded SMT power Do not purchase. Do not L2, L1 47uH inductor, +/-20%, 1.17A, populate. 0.18 ohm Do not purchase. Do not MMBT3906 PNP Transistor / SOT-23 populate. Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 19 S1D13706F00A mount package 5V fixed voltage regulator, Do not purchase. Do not LT1117CST-5 SOT-223 populate. TI 74AHC04, SO-14 74AHC04 SO-14 package package Do not purchase. Do not ICD2061A Wide SO-16 package populate. Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 20 0805 Resistor, 0 ohm side to short pins 2-3 of 0ohm JP2 and JP3 Epson SG8002DB, (U6) 50MHz Oscillator DIP14, 50MHz 50MHz, socketed Epson SG8002DB, (U5) 6.5MHz Oscillator DIP14, 6.5MHz 6.5MHz, socketed Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 21: Schematics

    Schematics 8 Schematics Figure 8-1: S5U13706P00C100 Schematics (1 of 5) Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 22 Schematics Figure 8-2: S5U13706P00C100 Schematics (2 of 5) Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 23 Schematics Figure 8-3: S5U13706P00C100 Schematics (3 of 5) Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 24 Schematics Figure 8-4: S5U13706P00C100 Schematics (4 of 5) Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...
  • Page 25 Schematics Figure 8-5: S5U13706P00C100 Schematics (5 of 5) Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 26: Board Layout

    Board Layout 9 Board Layout Figure 9-1: S5U13706P00C100 Board Layout Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 27: Change Record

    • section 11 - update sales office addresses X31B-G-021-01 Revision 1.0 - Issued: March 19, 2007 • initial draft • minor edits • added parts list • added schematics • updated tech support contact information Seiko Epson Corporation S5U13706P00C100 Evaluation Board Rev. 1.2...

  • Page 28: Sales And Technical Support

    Sales and Technical Support 11 Sales and Technical Support For more information on Epson Display Controllers, visit the Epson Global website. https://global.epson.com/products_and_drivers/semicon/products/display_controllers/ For Sales and Technical Support, contact the Epson representative for your region. https://global.epson.com/products_and_drivers/semicon/information/support.html Seiko Epson Corporation S5U13706P00C100 Evaluation Board...

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