Interface Signal Function Selection Restrictions And Considerations; I 2 S And Pcm; Serial Peripheral Interfaces - Cypress WICED CYW920706WCDEVAL Hardware User's Manual

9 Interface Signal Function Selection Restrictions and
Considerations
This section provides signal-function selection restrictions and/or general information associated with the following CYW20706
interfaces:

I2S and PCM

SPI1

SPI2

HCI UART

Peripheral UART

Broadcom Serial Control (BSC) (Compatible with I2C)

NVRAM
2
9.1 I S and PCM
CYW20706 contains I
Table 9-1 shows the shared I
PCM circuit blocks are used in a board design.
CYW20706 Pin
A8
B7
C7
C8

9.2 Serial Peripheral Interfaces

CYW20706 supports two serial peripheral interface (SPI) blocks: SPI1 (also known as Spiffy1) and SPI2 (also known as
Spiffy2).
The routing of the SPI1 interface is multiplexed using the GPIO_Pxx supported by CYW20706 (see Section
As shown in Table
device GPIO support.
The WICED Studio API allows configuring and controlling both SPI interfaces by providing functions for:

Clock control

Mode control

Data transfer method (half or full duplex)
For more information on the SPI1 interface, see SPI1.
For more information on the SPI2 interface, see SPI2.
CYW920706WCDEVAL Hardware User Guide
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2
S and PCM circuit blocks that share a common signal-routing interface.
2
S and PCM interface in pin order. It also shows which GPIO_Pxx cannot be used if the I
I2S_DO or PCM_OUT
I2S_CLK or PCM_CLK
I2S_DI or PCM_IN
I2S_WS or PCM_SYNC
2
Table 9-1. Shared I S and PCM Interface and GPIO_Pxx Usage Restrictions
7-1, the SPI2 interface has a fixed signal routing to CYW20706 pins; therefore, it does not require any
Doc. No.: 002-16535 Rev. **
When Interface Used, Do Not Use the
Signal
P0, P2, P3, P12, P28, P29, P34P35,
and P37
2
S or
Following GPIO_Pxx
8.1 "GPIO_Pxx").
29