Cyw20706 Interfaces; Fixed Interfaces - Cypress WICED CYW920706WCDEVAL Hardware User's Manual

7 CYW20706 Interfaces

The package CYW20706 is available in may have fewer GPIOs than the die. Some of these GPIOs are fixed function IOs
while others are reconfigurable for different interfaces. To accommodate its various applications, interface selection is
accomplished through a combination of signal routing to CYW20706 and programming using the WICED API described in later
sections.
CYW20706 interfaces are presented as two interface sets: fixed and selectable. The fixed interfaces are those with dedicated
pins and, thus, are always available. The selectable interfaces are those that a board designer chooses to use from a superset
of possible interfaces that CYW20706 supports.
See Section 7.1 "Fixed
more information on the set of interfaces from which board designers can choose.

7.1 Fixed Interfaces

Table 7-1 shows the fixed straps and digital I/O interfaces of CYW20706. In contrast to the
interfaces of CYW20706 have dedicated pins.
Strap or Interface Purpose
XTAL frequency selection
Device reset
OTP usage
HCI UART
Serial Peripheral Interface (SPI) or I
Broadcom Serial Control (BSC)
1
Use the SPI2 interface for applications where the CYW20706 firmware image is to be loaded from onboard serial flash. The SPI2
interface is sometimes referred to as Spiffy2.
2
Although the SPI2_MISO_I2C_SCL and SPI2_MOSI_I2C_SDA signal names imply support for an I
and E8, an I2C-compatible interface is not usable via these pins since the SPI signals are connected to the serial flash on this hardware.
CYW20706 does support an I
9.5 "Broadcom Serial
CYW920706WCDEVAL Hardware User Guide
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Interfaces" for more information on the fixed interfaces. See Section
1
2
C, sometimes known as
1
Table 7-1. Fixed Straps and Digital I/O Interfaces
2
C-compatible interface (BSC interface) via pins A8 and C7 (including pull ups) or B7 and C7 (see Section
Control").
Doc. No.: 002-16535 Rev. **
Signals Pins
BT_XTAL_STRAP_0 G3
F2
BT_XTAL_STRAP_1 F2
0
0
1
1
RST_N A6 Active LOW reset input
BT_OTP_3P3V_ON G2 Pull HIGH if OTP is used; otherwise, pull LOW.
BT_UART_RXD F5 HCI UART receive data (or SWDIO, see 9.3.1)
BT_UART_TXD F4 HCI UART transmit data (or SWDCLK, see
9.3.1)
BT_UART_RTS_N F3 HCI UART request-to-send input
BT_UART_CTS_N G4 HCI UART clear-to-send input
2
SPI2_MISO_I2C_SCL D8 SPI MISO
2
SPI2_MOSI_I2C_SDA E8 SPI MOSI
SPI2_CLK E7 SPI clock output
SPI2_CSN D7 SPI active LOW chip select output
7.2 "Selectable Interfaces" for
Selectable Interfaces, the fixed
Notes
G3 XTAL
0 40 MHz
1 24 MHz
0 20 MHz
1 Read from
NV memory
2
C-compatible interface via pins D8
16