AT90S2313
60
Figure 45. Port D Schematic Diagram (Pin PD1)
MOS
PULL-
UP
PD1
WRITE PORTD
WP:
WD:
WRITE DDRD
READ PORTD LATCH
RL:
RP:
READ PORTD PIN
READ DDRD
RD:
TXD:
UART TRANSMIT DATA
UART TRANSMIT ENABLE
TXEN:
Figure 46. Port D Schematic Diagram (Pins PD2 and PD3)
RD
RESET
R
Q
D
DDD1
C
WD
RESET
R
Q
D
PORTD1
C
RL
WP
RP
TXEN
TXD
0839G–08/01