Hardware layout and configuration
Table 18. STMicroelectronics Morpho connector on NUCLEO-F072RB,
CN7 odd pins
Pin No.
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
1. Default state of BOOT0 is 0. It can be set to 1 when a jumper is on pin5-7 of CN7.Two unused
jumpers are available on CN11 and CN12 (bottom side of the board).
2. U5V is 5 V power from ST-LINK/V2-1 USB connector and it rises before +5V
3. PA13 and PA14 share with SWD signals connected to ST-LINK/V2-1, it is not recommended to
use them as IO pins if ST-LINK part is not cut.
4. Please refer to
44/55
CN7 even pins
Name
Name
PC10
PC11
PC12
PD2
VDD
E5V
(1)
BOOT0
GND
-
-
-
IOREF
PA13
RESET
PA14
+3V3
PA15
+5V
GND
GND
PB7
GND
(3)
PC13
VIN
(3)
PC14
-
PC15
PA0
PF0
PA1
PF1
PA4
VBAT
PB0
PC1 or
PC2
(4)
PB9
PC0 or
PC3
(4)
PB8
Table 9: Solder bridges
DocID025833 Rev 4
NUCLEO-F334R8
CN10 odd pins
Pin No.
Pin No.
2
1
4
3
6
5
8
7
10
9
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
38
37
for detail
CN10 even pins
Name
Name
Pin No.
PC9
PC8
PB8
PC6
PB9
PC5
(2)
AVDD
U5V
GND
-
PA5
PA12
PA6
PA11
PA7
PB12
PB6
PB11
PC7
GND
PA9
PB2
PA8
PB1
PB10
PB15
PB4
PB14
PB5
PB13
PB3
AGND
PA10
PC4
PA2
-
PA3
-
UM1724
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
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