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One ISI connector (camera interface)
3.11
Debug Interface
The AT91CAP standard serial debug interface (DBGU) is carried through the DB9 male socket, J23. It is
routed to the DBGU port of the AT91CAP9 chip installed on the mezzanine.
3.12
Memory Expansion Slots
Two memory card dedicated connectors:
J28 for DataFlash, SD/SDIO/MMC card slot
J29 for SD/SDIO/MMC card slot
Note that both adopt the same connector but that J28 is also DataFlash
muxing (refer to
3.13
PIO Connectors
All PIOs of the AT91CAP9 are routed to peripheral extension connectors (J17 to J20). This allows the
developer to add external hardware components or boards.
Note:
3.14
FPGA Extension
3.14.1
Overview
The AT91CAP-DKM motherboard routes most of the FPGA IOs coming from the mezzanine to on-board
prototyping ports (free for custom user board implementation). These are grouped on sheet 4/13 of
tion 15 "AT91CAP-DKM
J9 = PCI64 female connector for FPGA I/O expansion
J8/J10 = two 200-pin connectors for "Mistral" extension board
Warning: FPGA IOs are distributed among J8, J9 and J10 connectors and also the three USB device
ports, some having dual connections as follows:
AT91CAP9A-DK Development Kit User Guide
"PIO Usage" on page 3-24,
Most of the PIO lines already have an assignment on board. Therefore be aware of the
schematic routing prior to customizing these lines in any way. Do not cause electrical con-
tention as this may potentially damage the boards and the AT91CAP9 chip.
Schematics":
(PIO A muxing table) and
®
compatible due to its signal
"AT91CAP-DKM
Schematics").
6321B–CAP–02-Jul-07
Sec-
3-5
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