Design Guideline - Advantech SOM-ETX Series Design Manual

LCDG7 TTL Green Data 7
C09 DE I Data enable signal
C52 SHFCLK I Clock signal
C46 LCDON
I Power enable signal
C44 BACKON#
I Backlight enable signal

5.6.2 Design Guideline

Figure 5.18 and Figure 5.19 show LVDS LCD and TTL LCD connections. And Table
5.14 shows LVDS and TTL pin-out table.
SOM-ETX
BACKON
SOM-ETX
LCDON
VGA
BACKON
Note:
*All SOM-ETX TTL LCD signal level is 3.3V. For 5V signal level TTL LCD, Advantech
suggests add a Buffer IC (e.g. 74AC374) to convert the signal level by power support
voltage. If you need to support 3.3 and 5V level LCD, Buffer IC and 0 Ohm resistor
co-layout is suggested.
*For detail circuit, please see the Advantech reference schematic.
82
Advantech SOM-ETX Design Guide
LCDON
Damping
LVDS+
VGA
LVDS-
10~ 33 Ohm
Figure 5-18 LVDS LCD Connections
Damping
TTL
10~ 33 Ohm
Figure 5-19 TTL LCD Connections
Chapter 5 Carrier Board Design Guidelines
Carryboard
+5V +3.3V
Bead
Power
VDD
Transfer
30Ohm
@100Mhz
120 Ohm
@100MHz
Carryboard
+5V +3.3V
Bead
Power
VDD
Transfer
30Ohm
@100Mhz
Buffer IC
for Level
Shift
120 Ohm
@100MHz
10pF
LVDS
LCD
Connector
Inverter
Connector
TTL LCD
Connector
Inverter
Connector