Layout Guideline - Advantech SOM-ETX Series Design Manual

5.7.2.4 Compact Flash Socket Implementation Notes
The Compact Flash (CF) card cannot be hot-plugged (changed while the system is
powered). If hot-plug support is necessary, then a PCI-based CardBus controller chip
can be integrated onto the baseboard and used to control the CF socket. The CF
card can be configured as a slave device when CSEL signal be set as non-
connection. If two CF cards (or a CF card and a hard drive) are used in the
master/slave mode on the same IDE port, the DASP# pins of both devices must be
connected. Also, the PDIAG# pins both devices also must be connected. These pins
negotiate between the master and slave devices, and the devices may not function
correctly unless these pins are interconnected. Because some SOM-ETX modules
contain an onboard flash disk on the secondary IDE port, the DASP# and PDIAG#
pins of that disk are brought to the SOM-ETX connector and must be connected to
the same pins of any other secondary IDE device which is implemented in the
system.

5.7.3 Layout Guideline

5.7.3.1 IDE data and strobes routing guideline
This section contains guidelines for connecting and routing the IDE interface. The
SOM-ETX provides two independent IDE channels. This section provides guidelines
for IDE connector cabling and carried board design. Additional external 0 Ω resistors
can be incorporated into the design to address possible noise issues on the carried
board. If used, these resistors should be placed close to the connector.
The IDE interface can be routed with 6-mil traces on 6-mil spaces (dependent upon
stack-up parameters), and must be less than 10 inches long (from SOM-ETX
connector to carried board IDE connector). Additionally, the maximum length
difference between the data signals and the strobe signal of a channel is 450 mils.
Table 5.16 IDE Signal Groups
Signal Group
Data
Strobes
Table 5.17 IDE Routing Summary
IDE Routing
Trace Impedance
requirements
6 on 6 (Based
55 Ω ± 10% on stack-up in
chap 4)
88
Advantech SOM-ETX Design Guide
Primary
PDD [15:0]
PDIOR# (write)
PIORDY (read)
Max Trace
length
inches
Chapter 5 Carrier Board Design Guidelines
Secondary
SDD[15:0]
SDIOR# (write)
SIORDY (read)
IDE Signal length matching
The two strobe signals must be
matched within 100 mils of each other.
The data lines must be within ± 450
mils of the average length of the two
strobe signals