Design Guidelines - Advantech SOM-ETX Series Design Manual

System on modules
Table of Contents

Advertisement

5.1.2 Design Guidelines

5.1.2.1 Differences among PCI Slots
Most PCI signals are connected in parallel to all the slots (or devices). The
exceptions are the following pins from each slot or device:
IDSEL
: Connected (through resistor) to a different AD line for each slot.
CLK
: Connected to a different SOM-ETX PCI clock signal for each slot.
INTA#~ INTD#
: Connected to a different SOM-ETX interrupt signal for each slot.
REQ#
: Connected to a different SOM-ETX request signal for each slot, if used.
GNT#
: Connected to a different SOM-ETX grant signal for each slot, if used.
Each signal connects differently for each of the four possible slots or devices as
summarized in the following PCI Slots/Devices table 5.2.
Table 5.2 Carrier PCI Slots/Devices Interrupt Routing Table
SOM-ETX
AD19
(X1 Pin 73)
AD20
(X1 Pin 75)
AD21
(X1 Pin 78)
AD22
(X1 Pin 77)
INTA#
(X1 Pin 97)
INTB#
(X1 Pin 98)
INTC#
(X1 Pin 95)
INTD#
(X1 Pin 96)
Notes :
AD22 be used on SOM-4481 module. It's recommended to use AD16 for PCI slot 4
when design the CSB for SOM-4481 module.
62
Advantech SOM-ETX Design Guide
PCI Slot 1
PCI Slot 2
IDSEL
-
IDSEL
-
-
INTA#
INTD#
INTB#
INTA#
INTC#
INTB#
INTD#
INTC#
Chapter 5 Carrier Board Design Guidelines
PCI Slot 3
-
-
-
-
IDSEL
-
-
INTC#
INTD#
INTA#
INTB#
PCI Slot 4
-
-
-
IDSEL
INTB#
INTC#
INTD#
INTA#

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents