Synopsys DesignWare 826-0 Installation Manual page 35

PCIe IP Prototyping Kit Installation Guide
Table 2-1 Licensing and Tools Requirements (Continued)
License/Tool
DW_axi
DW_axi_x2x
DW_axi_gm
DW_axi_gs
Verification IP (VIP)
svt
a. Make sure to install all packages of HAPS ProtoCompiler (ConfPro and ProtoCompiler Runtime)
5.60a
March 2020
Version Description
4.02a The DW_axi component is a multilayer interconnect implementation of the AXI
protocol, which is designed for high-performance, high-frequency system
designs.
1.06a The DW_axi_x2x is a configurable bridge between an AXI master and an AXI
slave with any combination of different data port widths, different clock
frequencies, and different endianness.
2.03a The DW_axi_gm is a configurable module between a generic interface (GIF)
and an AXI bus.
2.02a The DW_axi_gs is used to reply to requests from the PCIe Axi bridge.
P-2019.09 VIP testbenches that comply with the SystemVerilog Universal Verification
Methodology (UVM).
Synopsys, Inc.
Setting Up Software Environment
SolvNetPlus 35
DesignWare