Setting Up Hardware Components
If you are using the Xilinx PHY, connect the Paddle board PCIe end to the PCIe Root Complex
■
slot.
If you are using a Synopsys PCIe PHY
■
Complex slot.
c.
Connect the PCIe endpoint device to the PCIe Endpoint slot.
d.
If you are using the Xilinx PHY, connect the Paddle board MGB end to the HAPS-80 MGB1 port.
Flip the PCIe Backplane board over the HAPS-80 board and align the Paddle board with the MGB
Brackets, see
1.
The Synopsys PCIe PHY can be a Synopsys C10, E16 or E32 PHY board.
20
SolvNetPlus
DesignWare
Figure 1-13
on page 22.
Synopsys, Inc.
1
, connect the PCIe PHY board to the PCIe Root
PCIe IP Prototyping Kit Installation Guide
March 2020
5.60a
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