Licensing And Tool Requirements - Synopsys DesignWare 826-0 Installation Manual

Setting Up Software Environment
2.1

Licensing and Tool Requirements

The following table lists the licenses and tools needed for extracting the release package, rebuilding the
Linux environment and configuring and rebuilding the FPGA image.
For the buildroot requirements, see
Table 2-1 Licensing and Tools Requirements
License/Tool
Extracting the Release Package
DWC-PCIE
DWC-PCIE-G<gen>-PREM-A-SRC
Rebuilding Linux Environment
gmake
GCC
tcl
Configuring and Rebuilding FPGA Image
CoreConsultant
(coreTools)
VCS (VCS VCSi)
Design Compiler
(Synthesis)
HAPS
ProtoCompiler
(ProtoCompiler)
Xilinx Vivado
DesignWare Products
DWC_pcie_ctl
34
SolvNetPlus
DesignWare
The Buildroot User Manual,
Version Description
<gen> depends on the PCIe Generation of the design. For example, for PCIe
Gen3 configurations, license DWC-PCIE-G3-PREM-A-SRC is required.
3.82 GNU Make is used to control, and build executable programs using the
program's source files, and by reading the makefiles.
5.2.0 GNU Compiler Collection is a compiler system that supports various
programming languages.
8.5.12 Tclsh is a shell-like application that reads and evaluates Tcl commands from a
standard input or from a file.
2019.06-SP2 The Synopsys coreConsultant tool facilitates design reuse by providing
reliable, error-free design configuration and high-quality synthesis of reusable
cores.
2018.09-SP2 VCS provides industry-leading performance and capacity, complemented by a
complete collection of advanced methodology-aware testbench and constraint
debug features, bug-finding, coverage, planning and assertion technologies.
2016.03-SP4 Design Compiler helps RTL designers perform a "what-if" analysis of floorplan
quickly and efficiently so that they can be ensured that the design meets its
targets during physical implementation without requiring iterations.
2018.09-4 ProtoCompiler tool combines hardware and software, and provides a
comprehensive and streamlined solution for prototyping single-FPGA designs
which target the Xilinx Virtex-7 and UltraScale FPGA family.
2018.1 The Vivado
new tool suite is architected to increase the overall productivity for designing,
integrating, and implementing with the Xilinx
Programmable (AP) SoC, and UltraScale™ devices.
5.60a The DesignWare PCI Express controller provides a solution to implement a
PCI Express port for a PCI Express root complex or endpoint application.
chapter "System Requirements".
®
Design Suite is designed to improve productivity. This entirely
Synopsys, Inc.
PCIe IP Prototyping Kit Installation Guide
a
® ®
7 series, Zynq -7000 All
5.60a
March 2020