Block Diagram Analysis; Timing - Processor Technology CUTS Assembly And Test Instructions

Computer users tape system
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PROCESSOR TECHNOLOGY CORPORATION
CUTS, COMPUTER USERS TAPE SYSTEM
SECTION V
5.1
INTRODUCTION
The CUTS module functions to transfer data bidirectionally
between a computer and one or two audio cassette recorders.
To per-
form its function, the module contains circuitry related to:
1.
port address recognition,
2.
computer-CUTS buffering,
3.
computer input/output command decoding,
4.
timing,
5.
status reporting,
6.
recorder on/Off control,
7.
parallel-to-serial and digital-to-audio conversions in
the write mode,
8.
audio-to-digital and serial-to-parallel conversions in
9.
and conversion of read data to NRZ (non-return to zero)
format.
5.2
BLOCK DIAGRAM ANALYSIS
A simplified block diagram of the CUTS module is provided in
Figure 5-1.
An address selector defines the port address for the CUTS
module.
It wor¥s with the address decoder to determine if the ad-
dress on Al-7 matches the port address for the module.
If it does,
the decoder produces the indicated CARD SELECT output to enable the
status in/out and strobe decoders.
Once an input or output request from the processor is recog-
nized, the status in/out decoder enables a PRDY line driver in the
wait state generator.
This generator inserts one wait state into
every input or output request from the processor.
The strobe decoder decodes the indicated inputs from the
processor to produce the STATUS WRITE, READ STATUS, DATA READ and
DATA WRITE strobe signals.
On an input cycle when A¢ is low, A¢ enables status outputs
from the UART, and the strobe decoder outputs a READ STATUS signal.
READ STATUS produces a delayed DRIVER ENABLE which gates the UART
status to the DI bus.
Should A¢ be high, however, the strobe deco-
der outputs a DATA READ to indicate to the UART that its data has
V-I

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