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PCI-DAS6013 and PCI-DAS6014 User's Guide
CTR2 GATE signal
You can use the CTR2 GATE signal for starting and stopping the counter, saving counter contents, etc. It is
polarity programmable and is available at the CTR2 GATE pin. Figure 26 shows the timing requirements for
the CTR2 GATE signal.
Rising Edge Polarity
Falling Edge Polarity
CTR2 OUT signal
This signal is present on the CTR2 OUT pin. The CTR2 OUT signal is the output of one of the two user's
counters in an industry-standard 82C54 chip. Figure 27 shows the timing of the CTR1 OUT signal for mode 0
and for mode 2.
For detailed information on counter operations, please refer to the data sheet on our web site at
www.mccdaq.com/PDFmanuals/82C54.pdf.
CTR2 CLK
CTR2 OUT (Mode 2)
CTR2 OUT (Mode 0)
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t
w
t
= 25 ns minimum
w
Figure 26. CTR2 GATE signal timing
Figure 27. CTR2 OUT signal timing
28
TC
Functional Details
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