Ctr1 Out Signal; Ctr2 Clk Signal; Ctr2 Gate Signal - Measurement Computing PCI-DAS6030 User Manual

Analog and digital i/o
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PCI-DAS6030 & PCI-DAS6032 User's Guide

CTR1 OUT signal

This signal is present on the CTR1 OUT pin. The CTR1 OUT signal is the output of one of the two user's
counters in an industry-standard 82C54 chip.
For detailed information on counter operations, refer to the data sheet on our WEB page at
www.measurementcomputing.com/PDFmanuals/82C54.pdf.
Figure 34 shows the timing requirements for the CTR1 OUT signal for counter mode 0 and mode 2.
CTR1 CLK
CTR1 OUT (Mode 2)
CTR1 OUT (Mode 0)

CTR2 CLK signal

The CTR2 CLK signal can serve as the clock source for independent user counter 2. It can be selected through
software at the CTR2 CLK pin rather than using the on-board 10 MHz or 100 kHz sources. It is also polarity
programmable. The maximum input frequency is 10 MHz. There is no minimum frequency specified.
Figure 35 shows the timing requirements for the CTR2 CLK signal.

CTR2 GATE signal

You can use the CTR2 GATE signal for starting and stopping the counter, saving counter contents, etc. It is
polarity programmable and is available at the CTR2 GATE pin.
Figure 36 shows the timing requirements for the CTR2 GATE signal.
Rising Edge Polarity
Falling Edge Polarity
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Figure 34. CTR1 OUT signal timing
t
=100 ns minimum
p
t
t
w-H
w-L
t
=15 ns minimum
w-H
t
=25 ns minimum
w-L
Figure 35. CTR2 CLK signal timing
t
w
Figure 36. CTR2 GATE signal timing
30
TC
t
w
= 25 ns minimum
Functional Details

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