9. Advanced table mode (XRF)
9.1 Operational principle
has access to an advanced table mode with increased func-
The
XRF
tionality, flexibility and significantly faster execution than normal
(
SIF
) table mode. Due to the added complexity, it is strongly recom-
mended that users be familiar with simple table mode before reading
this chapter.
Advanced table (
TPA
allel
DDS
interface. This allows one parameter to be updated at
the maximum supported rate, currently 16 ns per instruction. Due
to limitations of the
be modified via
PIF
the slower rate supported by the serial interface (
neither external modulation nor
There are therefore two kinds of instructions in advanced mode:
parallel and serial. Parallel instructions allow a single parameter to
be updated rapidly, whereas serial instructions are preloaded into
the serial interface and then activated in a subsequent command.
This load/activate cycle allows changes to be made to the parallel
parameter without having to wait for the serial load to complete.
Advanced mode also supports a more extensive selection of loop
options, including the ability to increment the parallel parameter for
piecewise linear interpolation. This is advantageous for generating
smooth envelopes with only a few table instructions.
The
FPGA
supports
(particularly on the
The
MOGL
abs
B3120
the high-speed bus as it has matched track lengths to minimise
relative delay between the signals.
) mode performs table execution via the par-
AD9910 DDS
devices, only one parameter can
, and the other parameters must be updated at
can be used in
PID
I/O
at the full update rate, but the rise-time
DE15
connector) must be taken into account.
break-out board is recommended when using
73
SIF
). Furthermore
mode.
TPA
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