MOGlabs ARF021 Manual page 54

44
Pin Signal
1 3.3 V
2 3.3 V
3 3.3 V
4 GND
5 A0
6 A1
7 A2
8 A3
9 GND
10 GND
Figure 7.2: High-speed digital IO connector (internal). Note that the
cable can be inserted upside-down, reversing the pin ordering.
Version Driver
R 2 74LVT2244
R 3-4 74LVTH2245
R 5+ 74LVTH162245
Table 7.1: High-speed
hardware can either configure the banks of 8 pins as above,
R 5+
or control sub-banks of 4 lines. For example to set pins D1-D4
(sub-bank 1A) as inputs and pins D5-D8 (sub-bank 1B) as outputs,
use the command:
EXTIO,MODE,1,HSB,READ,WRITE
Chapter 7. Digital I/O
Pin Signal Pin
11 A4 21
12 A5 22
13 A6 23
14 A7 24
15 GND 25
16 GND 26
17 B0 27
18 B1 28
19 B2 29
20 B3 30
Bank size Example configuration
Outputs only 16x outputs
Banks of 8 8x inputs, 8x outputs
Sub-banks of 4 4x inputs, 12x outputs
I/O configuration options
Signal
GND
GND
B4
B5
B6
B7
GND
GND
GND
GND
FFC