Page 1 Agile RF Synthesizer & AOM driver ARF021/ARF421, XRF021/XRF421 Version 1.5.0, Rev 6.
Page 2 MOGL abs. Contact For further information, please contact: MOG Laboratories P/L MOGLabs USA LLC MOGLabs Europe 49 University St 419 14th St Goethepark 9 Carlton VIC 3053 Huntingdon PA 16652...
Page 3 We hope that you enjoy using the ARF/XRF , and please let us know if you have any suggestions for improvement in the ARF/XRF or in this document, so that we can make life in the lab better for all. MOGL abs, Melbourne, Australia www.moglabs.com...
Page 5: Safety Precautions
Safety Precautions Safe and eﬀective use of this product is very important. Please read the following safety information before attempting to operate. Also please note several speciﬁc and unusual cautionary notes before using the MOGL ARF/XRF , in addition to the safety precautions that are standard for any electronic equipment.
Page 6: Protection Features
Protection Features MOGL ARF/XRF includes a number of features to protect you and your device. Open/short circuit Each output should be connected to a 50 Ω load. The will disable each high-power output if not con- ARF/XRF nected or if a short-circuit is detected. Reﬂected power The reﬂected power and VSWR (voltage standing wave ratio) are monitored and...
Page 7: Table Of Contents
Contents Preface Safety Precautions Protection Features 1 Introduction 1.1 Operating modes ..... on/oﬀ control ..... 2 Connections and controls 2.1 Front panel controls .
Page 8 Contents 5.4 Examples ......6 PID stabilisation 6.1 Signal conditioning ....6.2 PID control loop .
Page 9 Contents 9.9 Additional examples ....A Speciﬁcations B Firmware upgrades B.1 Firmware components ....B.2 Factory reset .
Page 10 Contents viii...
Page 11: Introduction
1. Introduction MOGL ARF/XRF consists of two independent AD9910 direct digital synthesizer (DDS) sources, each with 4 W ampliﬁer. The frequency, amplitude and phase of each output is software-controlled via a microcontroller and FPGA (ﬁeld programmable gate array). This enables direct control of the frequency, amplitude and phase of the signals, which can be adjusted in real-time using the front-panel control knobs, or via a scripting language over ethernet or .
Page 12: Operating Modes
Chapter 1. Introduction then further ampliﬁed with a GaN hybrid high-power output stage only). The signals are monitored to check output ARF421/XRF421 power and to measure the reﬂection ( VSWR chips are controlled by the FPGA . A microcontroller provides external interface with TCPIP communications, and controls...
Page 13: Advanced Mode
1.1 Operating modes : Basic mode Default state on power-up. In this mode, each channel acts as a simple single-frequency source, with the chips controlled directly by the FPGA . The frequency and power of the signal can be controlled via the front panel, using simple instructions over the FREQ computer interface (e.g.
Page 14: Rf On/Oﬀ Control
Chapter 1. Introduction on/oﬀ control output can be turned on and oﬀ via software control of the generators (through the command), but for many applica- tions that is too slow, and the extinction ratio is inadequate. The ARF/XRF has additional hardware-based on/oﬀ control on the output of each , using an switch before the ampliﬁers.
Page 15: Connections And Controls
2. Connections and controls 2.1 Front panel controls Agile RF Synthesizer ON/OFF CONTROL CHANNEL 1 CHANNEL 2 Starting with devices, the front-panel includes an interactive menu system for controlling the device. The buttons on the right- hand side of the display navigate through the menu structure, while the encoder wheel is used to edit values.
Page 16 Chapter 2. Connections and controls Figure 2.1: The main menu shows the current state of each channel. Left: both channels are in basic mode, with enabled on , and enabled on . Right: is in basic table mode, with the number of entries in the table shown.
Page 17 2.1 Front panel controls When an editable (yellow) value is selected, turning the encoder wheel changes the value of the selected digit as identiﬁed by the arrow and red text. To change the digit of interest, press the encoder wheel and the interface will change to digit selection mode. In this mode, the currently selected digit is shown on a black background, and is changed by turning the encoder wheel.
Page 18: Rear Panel Controls And Connections
Chapter 2. Connections and controls 2.2 Rear panel controls and connections RF OUT 1 RF OUT 2 FREQ 1 FREQ 2 CLK IN MON 1 MON 2 AMP 1 AMP 2 Model: 90-264 Vac Serial No: 47-63 Hz IEC power in is compatible with all standard power systems, from 90 to 264 V and 47 to 63 Hz.
Page 19: Internal Dip Switches
2.3 Internal DIP switches for controlling experimental devices such as shutters. Two general- purpose analogue outputs are also available for monitoring purposes. The B3110 breakout board is available to provide convenient connectors for each I/O channel. RJ45/USB-A Ethernet (TCP/IP 10/100 Mb/s) and communications jacks.
Page 20 Chapter 2. Connections and controls DIP 3 Default . Device settings, including network settings, are stored and loaded on startup. If invalid settings are saved to EEPROM PROM , disable 3 to load factory defaults to facilitate debugging and diagnostics. DIP 4 Default .
Page 21: Communications
3. Communications can be connected to a computer by or ethernet ( TCPIP The software package mogrf (chapter 4) provides interactive functi- onality, or communications can be integrated into existing control software. Examples of controlling the ARF/XRF in several languages are provided in Appendix D.
Page 22 Chapter 3. Communications > FREQ,1 < 80.00000009 MHz (0x147AE148) > FREQ,3 < ERR: Invalid channel, 3 In the above example, the frequency query provides a value ﬁrst in MHz as well as the internal setting (called the “frequency tuning word”) as hexadecimal in brackets. It is strongly recommended that all software should wait for this response and check whether it indicates an error before continuing.
Page 23: Tcp/Ip
3.2 TCP/IP 3.2 TCP/IP ARF/XRF can be accessed over ethernet via the IPv4 protocol. When ethernet is connected, the will attempt to obtain an address by . If fails, an internally deﬁned address will DHCP DHCP be used. In both cases, the address will be shown on the device display (for example, 10.1.1.190:7802), showing the address and port number for communicating with the device.
Page 24: Usb
Chapter 3. Communications 3.3 USB ARF/XRF can be directly connected to a host computer using a USB cable (type A-male). The device will appear as a Virtual port - a fast serial port that behaves like an connection. RS232 The required STM32 Virtual COM Port Driver ) device driver is available from the...
Page 25 3.3 USB Note that if the port appears in Device Manager with a diﬀerent name, then the driver was not successfully installed. If this occurs, disconnect the device from the host computer, reinstall the VCP driver, then reconnect the USB cable. The mogrf host software (§4) automatically enumerates the availa- ports when started, making device identiﬁcation simpler.
Page 26 Chapter 3. Communications...
Page 27: Mogrf Host Software
4. MOGRF host software The mogrf software package provides a simple user interface to the basic behaviour of ARF/XRF devices, with the ability to issue commands, run scripts, control tables, and apply ﬁrmware updates. Please note: It may be necessary to install a ﬁrmware update (see Appendix B) to use the software described in this section.
Page 28: Device Commander
Chapter 4. MOGRF host software 4.2 Device commander The Device commander is an interactive terminal for issuing com- mands and queries to your ARF/XRF device and displaying the result (Figure 4.2). The accepted commands and their functions are listed in Appendix C. Type statements into the Command box and exe- cute them by pressing the ENTER key or clicking...
Page 29: Mogrf Main Window
4.3 MOGRF main window 4.3 MOGRF main window The main window of mogrf is shown below. The two channels are displayed side-by-side, with information and controls that depend on the current operational mode of each channel. Figure 4.3: The main window of mogrf, showing Channel 1 in normal (NSB) mode and Channel 2 in simple table (TSB) mode.
Page 30: File Menu
Chapter 4. MOGRF host software 4. Channel output can be controlled by enabling only the switch (signal), ampliﬁers (power) or both (421-series only). 5. Options to enable external control of the channel output connector (see §7.6). using the input on the DB15 6.
Page 31 4.3 MOGRF main window 4.3.2 Settings menu Ethernet Allows conﬁguration of network connection settings ( address, mask, gateway and port). Particularly useful for conﬁguring the network . Note that changing the Static IP only has an settings over eﬀect if DHCP is disabled, or if DHCP...
Page 32 Chapter 4. MOGRF host software Figure 4.5: Modulation settings interface, showing that simultaneous FM and AM is enabled on Channel 1, with high bandwidth on AM. PID is disabled but constants have been set. Download settings Downloads conﬁguration and calibration data from the device and stores it in a ﬁle for backup purposes.
Page 33 MOGL abs for analysis. Figure 4.6: Diagnostic information about the connected unit, which should be sent to MOGLabs for analysis if there is a problem with the device. About Displays version information about the mogrf toolkit and connected ARF/XRF...
Page 34: Table Viewer
Chapter 4. MOGRF host software 4.4 Table viewer mode), mogrf provides a viewer for in- In simple table mode ( specting both the table instructions currently loaded into each chan- nel, as well as the instructions stored in memory (Figure 4.7). FLASH This is beneﬁcial for cataloguing the sequences in memory, as well as for debugging sequences which have been generated by scripts...
Page 35: External I/O Settings
4.5 External I/O settings 4.5 External I/O settings ARF/XRF provides extensive digital I/O capability through the EXTIO command and conﬁguration window (Figure 4.8). It displays the current input and output state of the I/O pins on both the DB15 connector (§7.1) and the high-speed banks (§7.2). This is to diag- nose the I/O state, and that any settings are correct for the desired application.
Page 36 Chapter 4. MOGRF host software 4. Analog monitoring signal currently output on the analog out- put pin of the connector. DB15 5. Current state of the two high-speed banks. The banks are di- sabled (black) on boot, and must be set to either read (yellow) or write (green) mode on a per-bank level.
Page 37: External Modulation
5. External modulation ARF/XRF supports external modulation of the through the modulation input connectors on the back-panel. Frequency, amplitude and phase modulation of the are supported, and dual- modulation is possible for simultaneous FM/AM or FM/PM. WARNING: The modulation inputs are nominally ±1V, and can be permanently damaged by applying higher voltages.
Page 38: Modulation Gain
Chapter 5. External modulation 5.2 Modulation gain The modulation gain, which controls the modulation depth, is set GAIN using the command. The gain is speciﬁed as a signed 32-bit integer (default 0) in either decimal or hexadecimal, with a negative value indicating the the modulation action is inverted The range of gain values is shown in the table below.
Page 39: Dual Modulation: Fast And Slow Modes
5.3 Dual modulation: fast and slow modes Similarly the gain required to achieve a desired modulation depth at 1 V input can be estimated as: 1073709056 65536 φ and G φ ◦ 250 MHz where M is the amplitude modulation depth and A is the initial amplitude (returned by the command as a hexadecimal number).
Page 40: Examples
Chapter 5. External modulation The signal processing chain causes a propagation delay between the modulation input and the output of approximately 500 ns in fast (parallel) mode, and < 3 s in slow (serial) mode. Furthermore, inducing a step change with slow modulation (e.g. using to switch the output) may appear to have jitter of up to 500 ns depending on the delay between the change in the modulation input and the...
Page 41 5.4 Examples Figure 5.1: Demonstration of simultaneous AM/FM modulated (red) when the modulation inputs are driven by the SLHRAMP monitor output (blue). Figure 5.2: Demonstration of high gain amplitude modulation showing LIMIT clipping at zero and the power limit set by the command.
Page 42 Chapter 5. External modulation 5.4.2 Comparison of fast and slow modulation The example here shows the same amplitude-modulated waveform FMSPEED using a 1 V sine wave at 100 kHz. When is set to FAST , the amplitude is modulated using the slow serial interface and the enve- FMSPEED lope displays large stepwise discretisation.
Page 43: Phase Modulation
5.4 Examples 5.4.3 Phase modulation In some applications, it is desirable to phase modulate one of the channels by ±π, and use the other channel to demodulate the re- sulting signal using a double-balanced mixer. This is achieved with a 2 Vpp modulation input with gain 0x7fff, or a 1 Vpp modulation input with gain 0xffff (Figure 5.4).
Page 44 Chapter 5. External modulation...
Page 45: Pid Stabilisation
6. PID stabilisation In addition to external modulation, the ARF/XRF also implements control loops which can be used in conjunction with an perform intensity or frequency stabilisation of a laser. Each channel has an independent controller, which acts to drive an “error signal”...
Page 46: Pid Control Loop
Chapter 6. PID stabilisation eﬀective bandwidth of amplitude stabilisation. Care must be taken to ensure that the signal fed into the does not exceed the ARF/XRF ±1 V modulation input tolerance, such as with a clamping circuit. For convenience, MOGL abs produces a signal-conditioning board B3120 ) available as an optional extra, which provides:...
Page 47: Dual Modulation With Pid
6.3 Dual modulation with PID 6.3 Dual modulation with PID It is possible to perform simultaneously with another form of modulation enabled. For example, can be used to compensate for the frequency response of components or the when per- forming wide-band frequency modulation, as shown in Listing 6.1. # enable FM on channel 1 MDN,1,FREQ,ON GAIN,1,FREQ,0x3FFFF...
Page 48: Noise-Eater Implementation
Chapter 6. PID stabilisation 6.4 Noise-eater implementation A common application for controllers is optical noise eating, which technical noise arising from power ﬂuctuations in a laser beam. Figure 6.1 shows a typical conﬁguration, where the intensity of the undiﬀracted (zero-order) beam is stabilised as seen in Figure 6.2. In this conﬁguration, the acts as a high-speed variable optical attenuator, diﬀracting some of the light into the unused ﬁrst-order...
Page 49: Example
6.5 Example measured optical power. If the measured power is too high, the power is increased and more light is diverted into the diﬀracted out- put. This allows ﬂuctuations in intensity to be suppressed, at the expense of reducing the transmitted power slightly (typically 90% transmission is achieved).
Page 50 Chapter 6. PID stabilisation...
Page 51: Digital I/O
7. Digital I/O digital inputs and outputs (0-5 V) are provided on the ARF/XRF through the DB15 connector on the rear panel, and the high-speed bus ( ). The inputs can be used as triggers and the outputs can be controlled manually or using by table mode entries (§8.3). Note: Digital inputs are pulled high, meaning that a disconnected input pin is equivalent to supplying a high to that input.
Page 52 Chapter 7. Digital I/O Signal Type CH1 OFF TTL in CH1 ON TTL in CH1 SEQ(*) TTL in CH1 DOUT TTL out CH2 SEQ(*) TTL in CH2 ON TTL in CH2 OFF TTL in CH2 DOUT TTL out ±2 5 V CH1 AOUT ±2 5 V CH2 AOUT...
Page 53: High-Speed Digital
7.2 High-speed digital CHx-ON Pin 2 (Ch1), Pin 6 (Ch2) to switch ON Driving this pin mode instructs the FPGA both the signal and ampliﬁers (if present). Has no eﬀect if the output is already enabled. For applications that require the ampli- ﬁers to stay powered on, the pin should be used instead.
Page 54 Chapter 7. Digital I/O Signal Signal Signal 3.3 V 3.3 V 3.3 V Figure 7.2: High-speed digital IO connector (internal). Note that the cable can be inserted upside-down, reversing the pin ordering. Version Driver Bank size Example conﬁguration 74LVT2244 Outputs only 16x outputs R 3-4 74LVTH2245...
Page 55: Xsma Breakout Board
7.3 XSMA breakout board 7.3 XSMA breakout board XSMA breakout board (Figure 7.3) is an optional additional com- ponent that provides connectors for each of the digital lines of both the connector (§7.1) and the high-speed bus (§7.2). DB15 The pins of the high-speed bus have matched track-lengths, to en- sure consistent propagation delay for applications using advanced table mode.
Page 56: Conﬁguration
Chapter 7. Digital I/O 7.4 Conﬁguration EXTIO command is used to control the behaviour of digital I/O. EXTIO,WRITE EXTIO,READ Outputs can be set with , and queried with when set to control, or commanded by table mode entries MANUAL when set to AUTOMATIC control.
Page 57 7.4 Conﬁguration EXTIO,MODE EXTIO,MODE,ch,pin,[mode] mode Change the mode of the speciﬁed . If , then mode either READ WRITE . If , then is either LATCH TOGGLE . If is disabled, it is enabled ﬁrst. R 5+ hardware, the sub-banks can be controlled using a second mode mode command.
Page 58: Ttl Switching
Chapter 7. Digital I/O 7.5 TTL switching A versatile feature of the ARF/XRF is the ability to rapidly switch in response to an external input. This enables rapid pulse- generation in synchronisation with other laboratory devices. In high-power units, the ampliﬁers can be controlled separately from signal using the following commands: ON,1 Turn on both signal and ampliﬁers (slow)
Page 59: External Switching Timing
7.6 External switching timing switching on the output via software or the front-panel. This functionality can be used as part of an interlock system. EXTIO,ENABLE,1,OFF EXTIO,MODE Enable the CHx-OFF behaviour as conﬁgured by EXTIO,DISABLE,1,OFF Disable the CHx-OFF input, regular operation using the commands.
Page 60 Chapter 7. Digital I/O Method Transition Time switch 25 ns switch 30 ns AM (fast) 500 ns < 3 us AM (slow) DB15 2 ms DB15 -OFF 40 ns Table 7.2: Typical on/oﬀ time delays for switching hardware components, and for diﬀerent methods of pulse generation. The time given for ampli- ﬁer transitions includes time for the output to stabilise, which may vary between hardware revisions.
Page 61: Counters
7.7 Counters Figure 7.5: Example of pulse generation using the CHx-OFF input. Red is signal; blue is the signal. 7.7 Counters Fast digital counters can be accessed for each digital input pin. devices can use these counters in advanced table mode (§9.4); devices can only use them manually in scripts.
Page 62: Examples
Chapter 7. Digital I/O H[IGH] Count while input is HIGH , enables counter L[OW] Count while input is , enables counter R[ISING] Count rising edges, enables counter F[ALLING] Count falling edges, enables counter B[OTH] Count both rising and falling edges, enables counter The following -mode example sets up a rising edge counter on HSB3...
Page 63 7.8 Examples EXTIO,WRITE,1,HS7,ON Sets port 7 of HSB1 to TTL HIGH EXTIO,WRITE,1,HSB,0x7 Simultaneously writes all pins in HSB1 . Sets pins 0-2 HIGH and pins 3-7 EXTIO,MODE,2,HSB,READ Sets the entire second high-speed bank into read mode (only available in R 3+ models) EXTIO,READ,2,HSB Simultaneously read all 8-inputs of the second...
Page 64 Chapter 7. Digital I/O...
Page 65: Simple Table Mode
8. Simple table mode Table mode performs sequential execution of up to 8191 instructi- ons with precise timing. This enables generation of complicated pulse sequences, custom envelope shapes, and automated control of experiment sequences through digital I/O. There are two versions of table mode: simple table mode ( mode) serial interface, and advanced table mode which utilises the...
Page 66: Deﬁning Table Entries
Chapter 8. Simple table mode The phase-accumulator of the is then reset and the table exe- cutes autonomously under control. This provides a very high FPGA degree of reproducibility in terms of both timing of instructions and output of the generators, as the phase accumulator is reset for every execution.
Page 67 8.2 Deﬁning table entries freq Frequency to output during this step Output power during this step phas Phase of the for this step Duration of this step (discretised at 1 us) ﬂags A comma-separated list of ﬂags, comprised of the following: Switch oﬀ...
Page 68 ﬁnal instruction that sets the output power to minimum. # Example of table output MODE,1,TSB # Begin table TABLE,ENTRY,1,1,100MHz,-10dBm,0,100 TABLE,ENTRY,1,2,100MHz,0dBm,0,100 TABLE,ENTRY,1,3,80MHz,-5dBm,0,100 TABLE,ENTRY,1,4,80MHz,-15.0dBm,0,100 TABLE,ENTRY,1,5,100MHz,-2.0dBm,0,100 TABLE,ENTRY,1,6,100MHz,0x0C00,0,100 TABLE,ENTRY,1,7,100MHz,0x0200,0,100 TABLE,ENTRY,1,8,100MHz,0x001,0,100 TABLE,ENTRIES,1,8 TABLE,START,1 Listing 8.1: Simple table mode demonstration. Figure 8.1: Demonstration of Listing 8.1 on an ARF021...
Page 69: Digital I/O
8.3 Digital I/O 8.3 Digital I/O Each entry in the table can control a single digital I/O pin (§8.3.1), or write multiple pins simultaneously (§8.3.2). However, pins must EXTIO be correctly conﬁgured using the to be used in table mode: inputs must be set to READ mode, and outputs must be set to...
Page 70 Chapter 8. Simple table mode IO3H Set pin 3 of associated high-speed bank to output HIGH IODT Toggle the output of the associated DOUT pin on the DB15 connector IOA2P Output a short pulse on pin 2 of high-speed bank A IOB1L Set pin 1 of high-speed bank B to output digital The example below shows how to toggle an output in the high-speed...
Page 71 8.3 Digital I/O Figure 8.2: Example of table mode, showing changing output (blue, lower trace) and synchronised output (red, upper trace) generated by the example in Listing 8.2. bit corresponds to a pin of the high-speed output banks. If a bit is IOMASK IOSET set in the...
Page 72 Chapter 8. Simple table mode outputs are written at once. Care must be taken when running two tables simultaneously to ensure that the same pin isn’t being writ- ten to simultaneously by both tables, which can result in undeﬁned IOMASK0x00FF behaviour.
Page 73 8.3 Digital I/O TRIGDF DB15 external input (equivalent to The trigger behaviour is to repeat the current instruction until a trigger is received. Thus if the trigger condition is met during the instruction period, execution will not immediately proceed to the next instruction but rather complete the duration of the instruction instruction should be as small as TRIG...
Page 74: Loops And Triggers
Chapter 8. Simple table mode Figure 8.3: Demonstration of waiting for a trigger within a table sequence. The second table entry is repeated until a falling edge in the trigger (magenta, top) is detected. The digital output (red, bottom) is toggled several times showing the instruction being repeated.
Page 75 8.4 Loops and triggers condition can be an integer in the range [1 4095], correspon- ding to the number of times to execute the loop, or a hardware IOxy descriptor ﬂag of the form , indicating the loop should be repe- ated until the digital input pin exhibits behaviour , as described...
Page 76 Chapter 8. Simple table mode a total of 5 times (Figure 8.4). Since the ﬁnal instruction cannot be a loop source, a “dummy” instruction is added to the end, which also turns oﬀ the TABLE,CLEAR,1 TABLE,ENTRIES,1,4 TABLE,ENTRY,1,1,100MHz,0dBm,0,1us TABLE,ENTRY,1,2,100MHz,-5dBm,0,4us TABLE,ENTRY,1,3,100Mhz,-10dBm,0,2us TABLE,LOOP,1,3,1,4 TABLE,ENTRY,1,4,100MHz,-30dBm,0,1us Listing 8.3: Demonstration of a simple loop Figure 8.4: Demonstration of a simple loop.
Page 77: Upload And Download
8.5 Upload and download 8.5 Upload and download The host software mogrf provides convenient functionality that ena- bles upload and download of tables in both binary and format. This simpliﬁes handling of tables, and allows simple generation of sequences from scripting languages like matlab or python, and the human-readable structure simpliﬁes trouble-shooting.
Page 78: Re-Arm And Restart
Chapter 8. Simple table mode 8.6 Re-arm and restart FPGA can be instructed to automatically re-arm the table after TABLE,REARM a successful execution using the command. This auto- matically prepares the table for execution from either hardware or software trigger once execution has ﬁnished. Furthermore, the table can be repeated continuously by enabling the TABLE,RESTART option.
Page 79: Linear Ramps
8.7 Linear ramps 8.7 Linear ramps It is often desirable to linearly ramp a parameter without having TABLE,RAMP to specify the individual table entries manually. The command provides a convenient way to generate such ramps. TABLE,RAMP TABLE,RAMP,ch,param,start,stop,duration,count param Appends table entries to the channel that linearly ramp start stop...
Page 80 Chapter 8. Simple table mode Figure 8.5: Output generated by Listing 8.7 showing linear ramps in amplitude. The ramp functionality can also be applied to frequency or phase. TABLE,RAMP Listing 8.8 shows how multiple commands can be used to execute a sequence of slow frequency ramps that can be watched on a spectrum analyser.
Page 81: Synchronous Table Execution
8.8 Synchronous table execution Figure 8.6: Frequency ramps achieved by chaining together RAMPFREQ commands in mode. 8.8 Synchronous table execution When operating both channels in table mode, it is possible to syn- chronise the two channels. This synchronisation occurs both at FPGA level (so that the table entries are stepped through simultaneously), and at the...
Page 82 Chapter 8. Simple table mode Figure 8.7: Example showing the two outputs when executing the same table synchronously on both channels. The remains in phase across table instructions. It is also possible to synchronise the triggers received by the DB15 two tables.
Page 83: Advanced Table Mode (Xrf)
9. Advanced table mode (XRF) has access to an advanced table mode with increased functi- onality, ﬂexibility and signiﬁcantly faster execution than normal ( table mode. Due to the added complexity, it is strongly recommen- ded that users be familiar with simple table mode before reading this chapter.
Page 84: Deﬁning Table Entries
Chapter 9. Advanced table mode (XRF) It should also be noted that the while the outputs can be syn- chronised, the rf components following the introduce a small frequency-dependent propagation delay. However, this delay is ﬁxed for a given frequency, and can be calibrated in applications where it is important.
Page 85 9.2 Deﬁning table entries The listing below demonstrates how to set up advanced table mode to control the envelope (amplitude) of the signal, # enter fast table mode MODE,1,TPA # clear any table entries or settings TABLE,CLEAR,1 # set amplitude (power) as the parallel parameter TABLE,XPARAM,1,POW # deﬁne a table TABLE,APPEND,1,POW,5dbm,16ns...
Page 86 Chapter 9. Advanced table mode (XRF) It is anticipated that many applications will only seek to control a single parameter, in which case only the parallel interface need be used. However, a second command format is provided to simultane- ously set all three parameters using the serial interface. TABLE,ENTRY TABLE,ENTRY,ch,num,freq,pow,phase,duration,flags Deﬁnes a serial (...
Page 87 9.2 Deﬁning table entries # some other instructions while the SIF loads TABLE,APPEND,1,POW,-5dbm,320ns TABLE,APPEND,1,POW,-10dbm,320ns TABLE,APPEND,1,POW,-5dbm,320ns # trigger the serial instruction TABLE,APPEND,1,POW,5dbm,200ns,UPD # another parallel instruction at new frequency TABLE,APPEND,1,POW,-5dbm,100ns # ﬁnal instruction to power down TABLE,APPEND,1,POW,0x0,0x1 Listing 9.3: Demonstration of parallel instructions during a SIF load Figure 9.2: Output generated by Listing 9.3 Note: The value corresponding to the parallel parameter is ignored when loading a serial update and must be set separately.
Page 88: Initial And Final States
Chapter 9. Advanced table mode (XRF) 9.3 Initial and ﬁnal states TABLE,ARM As in simple table mode, when the command is used to ready the table for execution, the output is enabled and ampliﬁers switched on (if present). The state of the after arming is therefore the same as the last table instruction that was run.
Page 89: Counters
9.4 Counters instruction will remain unless subsequently overwritten by one of these commands. It is therefore strongly recommended to specify the initial and ﬁnal states. 9.4 Counters devices are capable of controlling the digital input counters in advanced table mode, and using the counters as a loop condition. This assists in experiment automation, whereby the execution can be paused until a critical count is received.
Page 90: Loops And Triggers
Chapter 9. Advanced table mode (XRF) The example below shows how to conﬁgure a counter, control it with table ﬂags, and use it as a loop condition. # conﬁgure the counter EXTIO,MODE,1,HSB,READ # set bank A into read mode EXTIO,COUNTER,1,HS1,FALLING # set pin A1 to count falling edges # create the table MODE,1,TPA...
Page 91: Linear Ramps Using Extrapolation
9.6 Linear ramps using extrapolation 9.6 Linear ramps using extrapolation One of the powerful features provided in advanced table mode is the ability to specify linear ramps in parallel mode, which reduces the number of instructions necessary to produce smooth piecewise- linear ramps.
Page 92 Chapter 9. Advanced table mode (XRF) Listing 9.6 demonstrates how to linearly ramp the power in 100 steps using a single instruction instead of 100 individual instructions REPn using the notation. The result is shown in Figure 9.3. TABLE,CLEAR,1 TABLE,XPARAM,1,POW # set power to OFF TABLE,APPEND,1,POW,0x0,0x1 # linear ramp up (100 steps)
Page 93: Frequency Gain
9.7 Frequency gain TABLE,RAMP Listing 9.7 shows the equivalent formulation using the command, which allows the power to be speciﬁed in dBm instead of hexadecimal increments. TABLE,CLEAR,1 TABLE,XPARAM,1,POW # deﬁne a ramp from oﬀ (0x0) to 0dBm TABLE,RAMP,1,POW,0x0,0dBm,16ns,100 # append the reverse of the ramp TABLE,RAMP,1,POW,0dBm,0x0,16ns,100 # loop back to the beginning twice more TABLE,LOOP,1,-1,1,2...
Page 94 Chapter 9. Advanced table mode (XRF) Gain Step Gain Step 0.23 Hz 7.54 kHz 59.6 Hz 1.95 MHz 0.47 Hz 15.3 kHz 119 Hz 3.91 MHz 0.93 Hz 30.5 kHz 238 Hz 7.81 MHz 1.86 Hz 61.0 kHz 477 Hz 15.6 MHz 3.73 Hz 122 kHz...
Page 95: Other Instruction Parameters
9.8 Other instruction parameters 9.8 Other instruction parameters The following parameters can also be speciﬁed in parallel table entries, for special behaviours, as listed below. Instructions that use the serial interface must be followed with a subsequent instruction containing the ﬂag to activate them.
Page 96: Additional Examples
Chapter 9. Advanced table mode (XRF) 9.9 Additional examples 9.9.1 Gaussian envelope The following example demonstrates creation of a short (300 ns) Gaussian pulse by specifying the output power at the maximum up- date rate (instruction duration 0 1 = 16 ns). The resulting output waveform is shown in Figure 9.5.
Page 97 9.9 Additional examples Figure 9.5: Example of a short Gaussian pulse. 9.9.2 Back-to-back pulses with diﬀerent frequency This example demonstrates how to generate two back-to-back 1 s pulses with diﬀerent frequencies by loading the second frequency during the ﬁrst pulse. The feature is used to smooth EXTRAPOLATE the envelope, and the...
Page 98 Chapter 9. Advanced table mode (XRF) TABLE,APPEND,1,POW,0x0264,0x1,REP3 TABLE,APPEND,1,POW,0x0222,0x1,REP3 TABLE,APPEND,1,POW,0x017b,0x1,REP3 TABLE,APPEND,1,POW,0x0088,0x1,REP3 TABLE,APPEND,1,POW,-0x088,0x1,REP3 TABLE,APPEND,1,POW,-0x17b,0x1,REP3 TABLE,APPEND,1,POW,-0x222,0x1,REP3 TABLE,APPEND,1,POW,-0x264,0x1,REP3 TABLE,APPEND,1,POW,-0x244,0x1,REP3 TABLE,APPEND,1,POW,-0x1db,0x1,REP3 TABLE,APPEND,1,POW,-0x153,0x1,REP3 TABLE,APPEND,1,POW,-0x0d1,0x1,REP3 TABLE,APPEND,1,POW,-0x06a,0x1,REP3 TABLE,APPEND,1,POW,-0x01f,0x1,REP3 # trigger the frequency change TABLE,APPEND,1,HOLD,0x1,UPD # loop back to create second pulse TABLE,LOOP,1,-1,4,1 TABLE,APPEND,1,POW,0x0,0x1 Listing 9.9: Back-to-back shaped pulses with diﬀerent frequencies Figure 9.6: Two 1 s Gaussian pulses generated in advanced table mode with amplitude on the parallel bus.
Page 99 9.9 Additional examples 9.9.3 Parallel frequency mode The following example demonstrates control of the frequency with the parallel interface. # set up table mode MODE,1,TPA TABLE,CLEAR,1 # use HSB for triggering EXTIO,CTRL,1,HSB,AUTO # change to FREQ mode and set the FM gain TABLE,XPARAM,1,FREQ,15 # step through a number of frequencies TABLE,APPEND,1,FREQ,20,0x5,IOA1H...
Page 100 Chapter 9. Advanced table mode (XRF)
Page 101: A Speciﬁcations
A. Speciﬁcations Speciﬁcation Parameter RF characteristics +36 dBm/+16 dBm (421/021 models) Max output power 14-bit resolution Amplitude control 20 to 400 MHz Frequency 32-bit resolution; 0.232831 Hz steps Frequency control ◦ ±1 ppm (0 to 50 Frequency stability 0 to 2π (16-bit resolution) Phase <...
Page 102 Appendix A. Speciﬁcations Digital input/output (per channel) hardwired, positive logic only RF on/oﬀ input to continue table execution Trigger input output on DB15 connector Shutter output 16 x shared High-speed I/O 2.2 V TTL input high 0.6 V TTL input low 7.0 V Absolute max in -0.5 V...
Page 103: B Firmware Upgrades
B. Firmware upgrades From time to time, MOGL abs will release updates to the ARF/XRF ﬁrmware, which enable new functionality or address issues in the version which shipped with your device. This section contains in- structions on how to apply ﬁrmware updates to your device. The device ﬁrmware consists of several components.
Page 104: Factory Reset
Appendix B. Firmware upgrades B.2 Factory reset If a ﬁrmware upgrade fails and the device subsequently cannot boot, a factory reset (rebooting with DIP4 set to ) must be applied. The device will then attempt to restore the conﬁguration it was shipped with to restore operation.
Page 105 B.3 Upgrade via mogrffw Figure B.1: The mogrffw ﬁrmware update application connected to a unit, showing the serial number (1), model (2) and current ﬁrmware versions (3). Note that some values may be unavailable if the device is in “ﬁrmware up- date mode”.
Page 106 Appendix B. Firmware upgrades Figure B.2: The mogrffw ﬁrmware update application. The versions run- ning on the device are compared against the selected package, in this instance showing that an update is available for the UC (yellow) and the other components are up-to-date (green). The upload process proceeds through four stages: 1.
Page 107: Upgrade Via Web Interface
4. Use a web browser and connect to the speciﬁed IP address. 5. At the prompt, enter your user ID and password. These are user-conﬁgurable but by default are moglabs UserID: agilerf Password: 6. Select Browse and then select the microcontroller ﬁrmware ﬁle.
Page 108: Upgrading An Arf To An Xrf
Appendix B. Firmware upgrades B.5 Upgrading an to an It is possible to ﬁeld-upgrade an into an to gain access to advanced table mode, using the upgrade tool provided as part of the mogrf distribution (Figure B.3). It may be necessary to install a new version of mogrf to access this program.
Page 109: C Command Language
Please note: The command language is being continuously updated across ﬁrmware releases to improve functionality and add features. When upgrading ﬁrmware, please refer to the most recent version of the manual available at http://www.moglabs.com In particular, code written for ﬁrmware before v1.0 may need up- dating to be compatible with newer releases;...
Page 110: General Functions
Appendix C. Command language Calibrations are used to convert parameters to internal discretised values. Most commands will return a message that includes the actual value, which may diﬀer from the requested value because of discretisation and/or parameter limits. If required, internal values can be speciﬁed directly using hexade- cimal formatted to include a “0x”...
Page 111: Primary Rf Control
C.4 Primary control Note: this command automatically switches oﬀ both the signal ampliﬁer of the designated channel. OFF/ON OFF,ch[,mode] ON,ch[,mode] Control output for speciﬁed channel. The signal and ampliﬁers can be individually controlled, which allows for more rapid switching response (see §7.6). mode is one of: Turn oﬀ/on the...
Page 112 Appendix C. Command language FREQ,1,100000000.0 FREQ,1,100MHz FREQ,1,0x1999999A POWER POW,ch[,value] modes only. Set channel to speciﬁed output power (or amplitude). The output power is computed using a factory calibra- tion, and has 14-bit resolution. Requesting a value higher than the LIMIT limit set with the command results in an error.
Page 113: Modulation
C.5 Modulation DEBOUNCE DEBOUNCE,ch[,off/on] digital control inputs can be debounced to allow opera- DB15 tion with noisy signals, such as from a push-button or toggle switch. DEBOUNCE command enables or disables the debounce ﬁlter for the selected channel (default: SINCFILTER SINC,ch[,onoff] Activate or deactivate the internal sinc ﬁlter of the for the...
Page 114: Digital Ramp Generator
Appendix C. Command language gain Optionally specify gain for this modulation type; equivalent to sub- GAIN sequently using the command. GAIN GAIN,ch,mdntype[,gain] Sets the modulation gain for the speciﬁed modulation type on the gain given channel. is a 32-bit signed integer that controls the gain depth of the modulation (§5.2).
Page 115 C.6 Digital ramp generator directly in mode using the registers (C.13), or more con- veniently through the commands below. Further information can be found in the DRG section of the AD9910 datasheet. RAMPBIT RAMPBIT,ch[,value] FREQ Enables or disables ramp functionality. If the ramp is active, the command has no eﬀect until disabled.
Page 116: Monitor Outputs
Appendix C. Command language RAMPFREQ Note that issuing a second command will stop any previ- ously conﬁgured ramp and replace it. However, ramps can be joined together in table mode. RAMPFREQ,1,400MHz,20MHz,0.1ms,10kHz Example: startfreq Start frequency of the ramp. endfreq End frequency of the ramp. timestep Duration of each frequency step.
Page 117: Clock Reference
C.8 Clock reference SQUARE Square wave (1Vpp, 62.5kHz) FLHRAMP Fast linear ramp (2Vpp, 12.5kHz), low-to-high (rising) FHLRAMP Fast linear ramp (2Vpp, 12.5kHz), high-to-low (falling) SLHRAMP Slow linear ramp (2Vpp, 5.7Hz), low-to-high (rising) SHLRAMP Slow linear ramp (2Vpp, 5.7Hz), high-to-low (falling) FWD1, FWD2 Monitor for the transmitted (forward) output power REV1, REV2...
Page 118: C.9 Table Mode
Appendix C. Command language Note: The external reference clock must have power between -10dBm and +10dBm. CLOCK CLKSRC The output of the command should be checked after using the command to ensure that synchronisation was successful. Never operate the in exter- ARF/XRF nal clock mode without providing a valid reference clock, as undeﬁned behaviour can result.
Page 119 C.9 Table mode START TABLE,START,ch TABLE,ARM Provides a software trigger to initiate table execution. Calls if the table is not already ready for execution, which can cause a short delay before output appears. Early 421-series models may encounter an error that the ampliﬁers are disabled when using this command.
Page 120 Appendix C. Command language Entry numbers start at 1 and tables can contain up to 8191 entries. The structure of this command is detailed in §8.2. TABLE,ENTRY,2,1,800MHz,0x1500,0x0000,10us Example: HEXENTRY TABLE,HEXENTRY,ch,num Queries the speciﬁed table entry, returning the internal hexadecimal representation of the associated frequency, amplitude and phase. APPEND TABLE,APPEND,ch,freq,ampl,phase,duration[,flags] Inserts the speciﬁed entry at the end of the table and increments...
Page 121: Pid Feedback
C.10 PID feedback provided for automation purposes. The response begins with a 32- bit unsigned integer that contains the number of bytes in the table, which is the number of bytes to be subsequently read. Note that raw table data may be incompatible between diﬀerent ﬁrmware versions.
Page 122 Appendix C. Command language ENABLE PID,ENABLE,ch,mode Enables the controller for the given channel in the speciﬁed mode , which is one of FREQ AMPL PHAS DISABLE PID,DISABLE,ch Disables the controller for the given channel. RATE PID,RATE,ch[,rate] rate rate Sets the at which the analogue control signal is digitised.
Page 123: External Io Functions
C.11 External IO functions MONITOR PID,MONITOR,ch[,name] INPUT or OUTPUT. This name Sets the monitor for the channel to signal is then output on the MOD OUT connector on the back panel. Note that the sample rate is at most 500 kS/s, which may limit observation of the loop bandwidth.
Page 124 Appendix C. Command language LATCH pin is enabled and once tripped, the output stays oﬀ until reset (interlock mode). TOGGLE pin directly speciﬁes the state of the switch, with logic HIGH oﬀ, on. If the pin is physically disconnected, the switch will be oﬀ. mode , then must be one of...
Page 125: Conﬁguration Settings
C.12 Conﬁguration settings EXTIO,READ,1,HSBANK DB15 connector, or to read the entire high- speed bank. COUNTER Control the counter associated with the speciﬁed pin. Syntax and functionality of the command is described in §7.7. C.12 Conﬁguration settings SET, GET Set and report EEPROM conﬁguration values.
Page 126: Direct Dds Control
Appendix C. Command language C.13 Direct DDS control For direct control the the chips, mode is provided. This allows direct access to the registers, but only a limited subset of commands are unavailable. WARNING: Using these commands bypasses all safeguards and can result in unde- ﬁned behaviour or damage to connected devices.
Page 127 C.13 Direct DDS control PHAS Phase oﬀset word (16-bit) AMPL Amplitude scale factor (32-bit) SYNC Multichip sync (32-bit) RLIM Digital ramp limit (64-bit) RSTP Digital ramp step size (64-bit) RRTE Digital ramp rate (32-bit) STP[0-7] Single tone proﬁle 0-7 (64-bit) RAMW RAM word register (32-bit) DINIT...
Page 128 Appendix C. Command language...
Page 129: D Code Examples
D.1 python Communication is handled by a “device” class, which provides con- venience functions for sending commands and queries. # ARF python example, (c) MOGLabs 2016 from mogdevice import MOGDevice # connect to the device dev = MOGDevice(’10.1.1.23’) # print some information print ’Device info:’, dev.ask(’info’)
Page 130 Appendix D. Code examples # ARF Gaussian pulse example, (c) MOGLabs 2016 from mogdevice import MOGDevice import numpy as np # connect to the device dev = MOGDevice(’10.1.1.45’) print ’Device info:’, dev.ask(’info’) # construct the pulse N = 200 X = np.linspace(-2,2,N) Y = 30*(np.exp(-X**2)-1)
Page 131: Matlab
ARF/XRF how to create a simple table that produces a pulse with a Gaussian envelope. %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % ARF MATLAB example, (c) MOGLabs 2017 %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% % create a device instance dev = mogdevice(); % example: connecting by ethernet dev.connect(’10.1.1.31’);...
Page 132: Labview
Appendix D. Code examples D.3 LabVIEW The LabVIEW drivers provided make use of NI-VISA to provide a uniﬁed interface over both ethernet and . They perform automatic error checking, and are compatible with LabVIEW-2009 and later editions. Figure D.2: Example LabVIEW program that connects to an ARF unit, and performs a number of queries When using these drivers, it is strongly recommended that the au- tomatic session close option be enabled, to prevent communications...
Page 134 2014 - 2018 MOG Laboratories Pty Ltd 49 University St, Carlton VIC 3053, Australia Product speciﬁcations and descriptions in this info@moglabs.com Tel: +61 3 9939 0677 document are subject to change without notice.

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Arf421 Xrf021 Xrf421

MOGlabs ARF021 Manual

Safety Precautions

Protection Features

1 Introduction

2 Connections and Controls

3 Communications

4 MOGRF Host Software

5 External Modulation

6 PID Stabilisation

7 Digital I/O

8 Simple Table Mode

9 Advanced Table Mode (XRF)

A Speciﬁcations

B Firmware Upgrades

C Command Language

D Code Examples

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