Tektronix SPG8000 Technical Reference page 8

Master sync / clock reference generator
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List of Figures
Figure 1: SPG8000 dimensions ...................................................................................
Figure 2: Setup to verify clock accuracy........................................................................
Figure 3: Setup for genlock test..................................................................................
Figure 4: Setup for genlock bit integrity test ...................................................................
Figure 5: Setup for LTC input gain and impedance test.......................................................
Figure 6: Setup for black output and frame pulse test.........................................................
Figure 7: Setup for black output bit integrity test..............................................................
Figure 8: Setup for Black amplitude and offset test (SD).....................................................
Figure 10: Setup for sine amplitude test ........................................................................
Figure 11: Setup for LTC level test..............................................................................
Figure 12: Setup for GPI output test ............................................................................
Figure 13: Setup for GPI input test ..............................................................................
Figure 14: Setup for 48 kHz clock output test .................................................................
Figure 17: Setup for tri-level sync and black (PAL) output tests.............................................
Figure 19: Setup for Composite offset and gain test...........................................................
Figure 20: Setup for luminance and chrominance test ........................................................
Figure 21: Setup for DC antenna output power voltage test..................................................
Figure 24: Setup for internal frequency calibration ...........................................................
Figure 25: Setup for output and jitter test.......................................................................
Figure 26: Setup for reference against the DMM ..............................................................
Figure 27: Set up the digital signal analyzer ...................................................................
Figure 28: Setup for characterization of the test system ......................................................
Figure 29: Setup for SDI output amplitude test ..............................................................
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SPG8000 Specifications and Performance Verification
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