Glossary
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A-6
interrupt: A signal sent by hardware or software to a processor requesting
attention. An interrupt tells the processor to suspend its current opera-
tion, save the current task status, and perform a particular set of instruc-
tions. Interrupts communicate with the operating system and prioritize
tasks to be performed.
interrupt service fetch packet (ISFP): A fetch packet used to service inter-
rupts. If eight instructions are insufficient, the user must branch out of this
block for additional interrupt service. If the delay slots of the branch do
not reside within the ISFP, execution continues from execute packets in
the next fetch packet (the next ISFP).
interrupt service routine (ISR): A module of code that is executed in re-
sponse to a hardware or software interrupt.
interrupt service table (IST) A table containing a corresponding entry for
each of the 16 physical interrupts. Each entry is a single-fetch packet and
has a label associated with it.
Internal peripherals: Devices connected to and controlled by a host device.
The 'C6x internal peripherals include the direct memory access (DMA)
controller, multichannel buffered serial ports (McBSPs), host port inter-
face (HPI), external memory-interface (EMIF), and runtime support tim-
ers.
IRQ: Interrupt request; see IRQ module .
IRQ module: IRQ is an API module that manages CPU interrupts.
IST: See interrupt service table.
least significant bit (LSB): The lowest-order bit in a word.
linker: A software tool that combines object files to form an object module,
which can be loaded into memory and executed.
little endian: An addressing protocol in which bytes are numbered from right
to left within a word. More significant bytes in a word have higher-num-
bered addresses. Endian ordering is specific to hardware and is deter-
mined at reset. See also big endian .
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