5.10 HPWR
5.10.1
HPWR_PDCTL
(RW) HPWR_PDCTL*
Fields
(RW) HPWR_PDCTL_DMA
(RW) HPWR_PDCTL_EMIF
(RW) HPWR_PDCTL_MCBSP0
(RW) HPWR_PDCTL_MCBSP1
(RW) HPWR_PDCTL_MCBSP2
* only on 6202 and 6203 devices
peripheral power-down control register
DMA clock enable
EMIF clock enable
MCBSP0 clock enable
MCBSP1 clock enable
MCBSP2 clock enable
HPWR
HAL Reference
5-41
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