Memory Ranges And Features - Siemens Simatic S7 Series System Manual

E.5

Memory ranges and features

Description
User program size
User data size
Process image input register
Process image output register
Analog inputs (read only)
Analog outputs (write only)
Variable memory (V)
Local memory (L)
1
Bit memory (M)
Special Memory Total
(SM)
Read
only
Timers
Retentive on-delay 1 ms
10 ms
100 ms
On/Off delay 1 ms
10 ms
100 ms
Counters
High-speed counters
Sequential control relays (S)
Accumulator registers
Jumps/Labels
Call/Subroutine
Interrupt routines
Positive/negative transitions
S7-200 SMART
System Manual, 09/2015, A5E03822230-AC
CPU SR20, CPU SR30,
CPU ST20 CPU ST30
12 Kbytes 18 Kbytes
8 Kbytes 12 Kbytes
I0.0 to I31.7 I0.0 to I31.7
Q0.0 to Q31.7 Q0.0 to Q31.7
AIW0 to AIW110 AIQ0 to AIW110
AQW0 to AQW0 to
AQW110 AQW110
VB0 to VB8191 VB0 to VB12287
LB0 to LB63 LB0 to LB63
M0.0 to M31.7 M0 to M31.7
SM0.0 to SM0.0 to
SM2047.7 SM2047.7
SM0.0 to SM0.0 to
SM29.7 SM29.7
SMB480.0 to SMB480.0 to
SM515.7 SM515.7
SM1000.0 to SM1000.0 to
SM1699.7 SM1699.7
256 (T0 to T255) 256 (T0 to T255) 256 (T0 to
T0, T64 T0, T64
T1 to T4, and T1 to T4, and
T65 to T68
T65 to T68
T5 to T31, and T5 to T31, and
T69 to T95
T69 to T95
T32, T96 T32, T96
T33 to T36, and T33 to T36, and
T97 to T100
T97 to T100
T37 to T63, and T37 to T63, and
T101 to T255
T101 to T255
256 (C0 to 256 (C0 to
C255) C255)
HC0 to HC3 HC0 to HC3
S0.0 to S31.7 S0.0 to S31.7
AC0 to AC3 AC0 to AC3
0 to 255 0 to 255
0 to 127 0 to 127
0 to 127 0 to 127
1024 1024
E.5 Memory ranges and features
CPU SR40, CPU CR40,
CPU ST40 CPU CR60
24 Kbytes 12 Kbytes
16 Kbytes 8 Kbytes
I0.0 to I31.7 I0.0 to I31.7
Q0.0 to Q31.7 Q0.0 to Q31.7
AIW0 to --
AIW110
AQW0 to ---
AQW110
VB0 to VB0 to VB8191
VB16383
LB0 to LB63 LB0 to LB63
M0.0 to M31.7 M0.0 to M31.7
SM0.0 to SM0.0 to
SM2047.7 SM2047.7
SM0.0 to SM0.0 to
SM29.7 SM29.7
SMB480.0 to SMB480.0 to
SM515.7 SM515.7
SM1000.0 to SM1000.0 to
SM1699.7 SM1699.7
256 (T0 to
T255) T255)
T0, T64 T0, T64
T1 to T4, and T1 to T4, and
T65 to T68 T65 to T68
T5 to T31, and T5 to T31, and
T69 to T95 T69 to T95
T32, T96 T32, T96
T33 to T36, and T33 to T36, and
T97 to T100 T97 to T100
T37 to T63, and T37 to T63, and
T101 to T255 T101 to T255
256 (C0 to 256 (C0 to
C255) C255)
HC0 to HC3 HC0 to HC3
S0.0 to S31.7 S0.0 to S31.7
AC0 to AC3 AC0 to AC3
0 to 255 0 to 255
0 to 127 0 to 127
0 to 127 0 to 127
1024 1024
References
CPU SR60,
CPU ST60
30 Kbytes
20 Kbytes
I0.0 to I31.7
Q0.0 to Q31.7
AIW0 to
AIW110
AQW0 to
AQW110
VB0 to
VB20479
LB0 to LB63
M0.0 to M31.7
SM0.0 to
SM2047.7
SM0.0 to
SM29.7
SMB480.0 to
SM515.7
SM1000.0 to
SM1699.7
256 (T0 to
T255)
T0, T64
T1 to T4, and
T65 to T68
T5 to T31, and
T69 to T95
T32, T96
T33 to T36, and
T97 to T100
T37 to T63, and
T101 to T255
256 (C0 to
C255)
HC0 to HC3
S0.0 to S31.7
AC0 to AC3
0 to 255
0 to 127
0 to 127
1024
703