E.3
High-speed counter summary
Table E- 3
S7-200 SMART HSC input assignments and capabilities
Clock A
Dir / Clock B
HSC0
I0.0
I0.1
HSC1
I0.1
HSC2
I0.2
I0.3
HSC3
I0.3
S model CPUs: SR20/ST20, SR30/ST30, SR40/ST40, SR60/ST60
1
C model CPUs: CR40, CR60
2
S7-200 SMART
System Manual, 09/2015, A5E03822230-AC
Reset
Single phase max.
clock/input rate
I0.4
200 kHz (S model CPUs)
100 kHz (C model CPUs)
200 kHz (S model CPUs)
100 kHz (C model CPUs)
I0.5
200 kHz (S model CPUs)
100 kHz (C model CPUs)
200 kHz (S model CPUs)
100 kHz (C model CPUs)
E.3 High-speed counter summary
Dual phase / AB quadrature phase max.
clock/input rate
100 kHz (S model CPUs)
1
(Maximum 1x count rate = 100 kHz)
2
(Maximum 4x count rate = 400 kHz)
50 kHz (C model CPUs)
(Maximum 1x count rate = 50 kHz)
(Maximum 4x count rate = 200 kHz)
100 kHz (S model CPUs)
(Maximum 1x count rate = 100 kHz)
(Maximum 4x count rate = 400 kHz)
50 kHz (C model CPUs)
(Maximum 1x count rate = 50 kHz)
(Maximum 4x count rate = 200 kHz)
References
695