Cisco PA-MC-2T3+ Installation And Configuration Manual page 74

Checking the Configuration
Cisco 7200 Series Routers
Following is an example of the show version command from a Cisco 7200 series router with the
PA-MC-2T3+:
Router# show version
Cisco Internetwork Operating System Software
IOS (tm) 7200 Software (C7200-JS-M), Released Version 12.0
Copyright (c) 1986-2000 by cisco Systems, Inc.
Compiled Fri 02-Jun-00 04:19 by biff
Image text-base: 0x600088F8, data-base: 0x61274000
ROM: System Bootstrap, Version 11.1(10) [dschwart 10], RELEASE SOFTWARE (fc1)
BOOTFLASH: 7200 Software (C7200-BOOT-M), Version 11.1(25.1)CC, EARLY DEPLOYMENT
ranger uptime is 5 weeks, 14 hours, 32 minutes
System returned to ROM by reload
cisco 7206 (NPE150) processor with 90112K/8192K bytes of memory.
R4700 CPU at 150Mhz, Implementation 33, Rev 1.0, 512KB L2 Cache
6 slot midplane, Version 1.3
Last reset from power-on
Bridging software.
X.25 software, Version 3.0.0.
SuperLAT software (copyright 1990 by Meridian Technology Corp).
TN3270 Emulation software.
4 Ethernet/IEEE 802.3 interface(s)
1 Serial network interface(s)
1 FDDI network interface(s)
2 Channelized T3 port(s)
125K bytes of non-volatile configuration memory.
1024K bytes of packet SRAM memory.
4096K bytes of Flash internal SIMM (Sector size 256K).
Configuration register is 0x0
Cisco 7301 Routers
Router# show version
Cisco Internetwork Operating System Software
IOS (tm) 7301 Software (C7300-JS-M), Experimental Version 12.2(20020904:004736) [biff 107]
Copyright (c) 1986-2002 by cisco Systems, Inc.
Compiled Mon 09-Sep-02 18:02 by biff
Image text-base:0x600088F8, data-base:0x61A94000
ROM:System Bootstrap, Version 12.2(20020730:200705) [biff-TAZ2_QA_RELEASE_16B 101],
DEVELOPMENT SOFTWARE
BOOTLDR:7301 Software (C7301-BOOT-M), Experimental Version 12.2(20020813:014224)
[biff-TAZ2_QA_RELEASE_17B 101]
7301p2b uptime is 0 minutes
System returned to ROM by reload at 00:01:51 UTC Sat Jan 1 2000
System image file is "tftp://10.1.8.11/tazii/images/c7301-js-mz"
cisco 7301 (NPE-G1) processor (revision A) with 491520K/32768K bytes of memory.
Processor board ID 0
BCM1250 CPU at 700Mhz, Implementation 1, Rev 0.2, 512KB L2 Cache
1 slot midplane, Version 2.0
Last reset from power-on
Bridging software.
PA-MC-2T3+ Multi-Channel T3 Port Adapter Installation and Configuration
4-20
Chapter 4 Configuring Unchannelized mode for the Cisco PA-MC-2T3+
OL-3526-05