General Purpose Register File
Figure 5 shows the structure of the 32 general purpose registers in the CPU.
Figure 5. AVR CPU General Purpose Working Registers
All the register operating instructions in the instruction set have direct and single cycle access to all registers. The only
exception is the five constant arithmetic and logic instructions SBCI, SUBI, CPI, ANDI, ORI between a constant and a
register and the LDI instruction for load immediate constant data. These instructions apply to the second half of the
registers in the register file - R16..R31. The general SBC, SUB, CP, AND, OR and all other operations between two regis-
ters or on a single register apply to the entire register file.
Register 30 also serves as an 8-bit pointer for indirect address of the register file.
ALU - Arithmetic Logic Unit
The high-performance AVR ALU operates in direct connection with all the 32 general purpose working registers. Within a
single clock cycle, ALU operations between registers in the register file are executed. The ALU operations are divided into
three main categories - arithmetic, logic and bit-functions.
In-System Programmable Flash Program Memory
The AT90S1200 contains 1K bytes on-chip In-System Programmable Flash memory for program storage. Since all instruc-
tions are single 16-bit words, the Flash is organized as 512 x 16. The Flash memory has an endurance of at least 1000
write/erase cycles.
The AT90S1200 Program Counter is 9-bit wide, thus addressing the 512 words Flash program memory.
See page 34 for a detailed description on Flash data downloading.
Program and Data Addressing Modes
The AT90S1200 AVR RISC Microcontroller supports powerful and efficient addressing modes. This section describes the
different addressing modes supported in the AT90S1200. In the figures, OP means the operation code part of the instruc-
tion word. To simplify, not all figures show the exact location of the addressing bits.
AT90S1200
6
7
General
Purpose
Working
Registers
0
R0
R1
R2
...
...
R28
R29
R30 (Z-Register)
R31
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