Register 15. PLL Input Source
Bit
D7
Name
Type
R/W
Reset value = 0000 0000
Bit
Name
7:4
Reserved
Leave as default.
3
PLLB_SRC
Input Source Select for PLLB.
0: Select the XTAL input as the reference clock for PLLB (Si5351A/C only).
1: Select the CLKIN input as the reference clock for PLLB (Si5351C only).
2
PLLA_SRC
Input Source Select for PLLA.
0: Select the XTAL input as the reference clock for PLLA.
1: Select the CLKIN input as the reference clock for PLLA (Si5351C only).
1:0
Reserved
Leave as default.
D6
D5
R/W
R/W
Preliminary Rev. 0.95
D4
D3
PLLB_SRC PLLA_SRC
R/W
R/W
Function
Si5351A/B/C
D2
D1
R/W
R/W
D0
R/W
29
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