Replacing A Crystal With A Clock; Hcsl Compatible Outputs - Silicon Laboratories SI5351A/B/C Product Manual

Si5351A/B/C

5.6. Replacing a Crystal with a Clock

The Si5351 can be driven with a clock signal through the XA input pin.
Note: Float the XB input while driving

5.7. HCSL Compatible Outputs

The Si5351 can be configured to support HCSL compatible swing when the VDDO of the output pair of interest is
set to 2.5 V (i.e., VDDOA must be 2.5 V when using CLK0/1; VDDOB must be 2.5 V for CLK2/3 and so on).
The circuit in the figure below must be applied to each of the two clocks used, and one of the clocks in the pair
must also be inverted to generate a differential pair. See register setting CLKx_INV.
OSC
20
V = 1 V
IN PP
25/27 MHz
0.1 µF
the XA input with a clock
Figure 16. Si5351 Driven by a Clock Signal
Multi
Synth
PLLA
0
PLLB
Multi
Synth
1
Multi
Synth
Note: The complementary -180 degree
N
out of phase output clock is generated
using the INV function
Figure 17. Si5350C Output is HCSL Compatible
Preliminary Rev. 0.95
XA PLLA
OSC
XB
PLLB
= 70 
Z
R
O
0  511 
240 
= 70 
Z
R
O
0  511 
240 
Multi
Synth
0
Multi
Synth
1
Multi
Synth
N
1
R
HCSL
2
CLKIN
1
R
2