Atmel ATmega48PV Manual page 162

15.11.3 TCNT2 – Timer/Counter Register
15.11.4 OCR2A – Output Compare Register A
15.11.5 OCR2B – Output Compare Register B
8025I–AVR–02/09
Table 15-9. Clock Select Bit Description
CS22 CS21
0 0
0 0
0 1
0 1
1 0
1 0
1 1
1 1
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
Bit 7
(0xB2)
Read/Write R/W
Initial Value 0
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a Compare Match between TCNT2 and the OCR2x Registers.
Bit 7
(0xB3)
Read/Write R/W
Initial Value 0
The Output Compare Register A contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2A pin.
Bit 7
(0xB4)
Read/Write R/W
Initial Value 0
The Output Compare Register B contains an 8-bit value that is continuously compared with the
counter value (TCNT2). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OC2B pin.
ATmega48P/88P/168P/328P
CS20 Description
0 No clock source (Timer/Counter stopped).
1 clk /(No prescaling)
T2S
0 clk /8 (From prescaler)
T2S
1 clk /32 (From prescaler)
T2S
0 clk /64 (From prescaler)
T2S
1 clk /128 (From prescaler)
T2S
0 clk /256 (From prescaler)
T 2 S
1 clk /1024 (From prescaler)
T 2 S
6 5 4
TCNT2[7:0]
R/W R/W R/W
0 0 0
6 5 4
OCR2A[7:0]
R/W R/W R/W
0 0 0
6 5 4
OCR2B[7:0]
R/W R/W R/W
0 0 0
3 2 1
R/W R/W R/W
0 0 0
3 2 1
R/W R/W R/W
0 0 0
3 2 1
R/W R/W R/W
0 0 0
0
TCNT2
R/W
0
0
OCR2A
R/W
0
0
OCR2B
R/W
0
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