Boot Option; Table 5. Boot Related Switch - ST STM32L073Z-EVAL User Manual

Hardware layout and configuration
Sources of reset are:
•
Reset button B1
•
Debugging tools from SWD connectors CN12 and CN11.
•
From a daughterboard connected to extension connectors, RESET is pin 24 of
connector CN5.
•
Embedded ST-LINK/V2-1
•
RS-232 connector CN6 for ISP. Jumper JP6 should be closed for RESET to be handled
by pin 8 of RS-232 connector CN6 (CTS signal).
7.6

Boot option

After reset, the STM32L073VZT6 MCU can boot from the following embedded memory
locations:
• User Flash memory
•
System Flash memory
• Embedded RAM (for debugging)
The microcontroller is configured to one of the listed boot options by setting the
STM32L073VZT6 port BOOT0 level by the switch SW1 and by setting nBOOT1 bit of
FLASH_OPTR option bytes register, as shown in
can be forced to high and, SW1 action overruled, by DSR line of RS-232 connector CN6, as
shown in
bootloader and start user Flash memory flashing process (ISP) from RS-232 interface. The
option bytes of STM32L073VZT6 and their modification procedure are described in the
reference manual RM0367. STM32 microcontroller system memory boot mode Application
Note (AN2606) details the bootloader mechanism and configurations.
Switch
(default setting)
SW1
18/64
Table 6: Boot related

Table 5. Boot related switch

STM32L073Z-EVAL evaluation board boots from User Flash. BOOT0 pin
is tied to "Low".
STM32L073VZT6 boots from system Flash memory (nBOOT1 bit of
FLASH_OPTR register is set high) or from RAM (nBOOT1 is set low).
BOOT0 pin is tied to "high".
Table
jumper. This can be used to force the execution of the
Description
UM1878 Rev 2
5. Depending on JP3, BOOT0 level
UM1878