I/O Memory Of Clock Timer - Epson S1C63656 Technical Manual

4.8.4 I/O memory of clock timer

Table 4.8.4.1 shows the I/O addresses and the control bits for the clock timer.
Register
Address
D3 D2
0 0 TMRST TMRUN
FF74H
R
TM3 TM2
FF75H
R
TM7 TM6
FF76H
R
EIT3 EIT2
FFE5H
R/W
0 0
FFE9H
R
IT3 IT2
FFF5H
R/W
0 0
FFF9H
R
*1 Initial value at initial reset
*2 Not set in the circuit
*3 Constantly "0" when being read
TM0–TM7: Timer data (FF75H, FF76H)
The 128–1 Hz timer data of the clock timer can be read out with these registers. These eight bits are read
only, and writing operations are invalid.
By reading the low-order data (FF75H), the high-order data (FF76H) is held until reading or for 0.48–1.5
msec (one of shorter of them).
At initial reset, the timer data is initialized to "00H".
TMRST: Clock timer reset (FF74H•D1)
This bit resets the clock timer.
When "1" is written: Clock timer reset
When "0" is written: No operation
Reading: Always "0"
The clock timer is reset by writing "1" to TMRST. When the clock timer is reset in the RUN status, opera-
tion restarts immediately. Also, in the STOP status the reset data is maintained. No operation results
when "0" is written to TMRST.
This bit is write-only, and so is always "0" at reading.
S1C63656 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Clock Timer)
Table 4.8.4.1 Control bits of clock timer
∗1
D1 D0 Name Init
∗3 ∗2
0 –
∗3 ∗2
0 –
∗3
TMRST Reset
W R/W
TMRUN 0
TM3 0
TM1 TM0
TM2 0
TM1 0
TM0 0
TM7 0
TM5 TM4
TM6 0
TM5 0
TM4 0
EIT3 0
EIT1 EIT0
EIT2 0
EIT1 0
EIT0 0
∗3 ∗2
0 –
0 EIT4
∗3 ∗2
0 –
∗3 ∗2
0 –
R/W
EIT4 0
IT3 0
IT1 IT0
IT2 0
IT1 0
IT0 0
∗3 ∗2
0 –
0 IT4
∗3 ∗2
0 –
∗3 ∗2
0 –
R/W
IT4 0
1 0
Unused
Unused
Reset Invalid Clock timer reset (writing)
Run Stop
Clock timer Run/Stop
Clock timer data (16 Hz)
Clock timer data (32 Hz)
Clock timer data (64 Hz)
Clock timer data (128 Hz)
Clock timer data (1 Hz)
Clock timer data (2 Hz)
Clock timer data (4 Hz)
Clock timer data (8 Hz)
Enable Mask Interrupt mask register (Clock timer 1 Hz)
Enable Mask
Interrupt mask register (Clock timer 2 Hz)
Enable Mask Interrupt mask register (Clock timer 8 Hz)
Enable Mask
Interrupt mask register (Clock timer 32 Hz)
Unused
Unused
Unused
Enable Mask Interrupt mask register (Clock timer 16 Hz)
(R) (R)
Interrupt factor flag (Clock timer 1 Hz)
Yes No Interrupt factor flag (Clock timer 2 Hz)
(W) (W) Interrupt factor flag (Clock timer 8 Hz)
Reset Invalid
Interrupt factor flag (Clock timer 32 Hz)
(R) (R) Unused
Yes No
Unused
(W) (W) Unused
Reset Invalid
Interrupt factor flag (Clock timer 16 Hz)
EPSON
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