Pulse/ Drive/ Ccd Block Diagrams - Panasonic AJ-SDX900P Service Manual

PULSE/ DRIVE/ CCD BLOCK DIAGRAMS

P3
2 TDO
3 TDI
6 TMS
8 TCK
TP101
IC107-108
IC109 IC110etc.
P10 P2 VARIABLE
4
1
1 1 CCD_HD PLL LPF
PHASE
SHIFT
IC105
DA DATA D/A
TG HD
P10 P2
3 3 CCD_VD
P10 P2
35 35 DA DATA DA DATA
P10 P2
38 38 SCLK
P10 P2
37 37 SDATA
P10 P2
36 36 SLD
P10 P2
31-34 31-34 LD_SEL1-4
IC101, Q101
REG
A+2.5V
+2.5V
IC101, Q100
REG
A+3V
+3V
A+3VPLD
IC102, Q102
REG
A+5V
+5V
IC102, Q103
REG
A-5V
-5V
P1003 P4
3 3 C+17V
4 4 C-11V
5 5 C+5.6V
6 6 C-5.6V
9 9 A+3.6V A+3.6V
P10 P2
9-11 9-11 R.G.B_DS
14-16 14-16 R.G.B_WS
IC20
P5 P1
REG
A+3.6V A3V 2 2
+3V
P5
P10 P2 P1
20 20 VTR_S/S VTR_S/S 3 3
21 21 CC FILTER CC FILTER 4 4
22 22 ND FILTER ND FILTER 5 5
23 23 MENU SW MENU SW 6 6
24-26 24-26 JOG PUSH/+/- JOG PUSH/+/- 7-9 7-9
27-28 27-28 SHUTT/SEL SHUTT/SEL 10-11 10-11
29 29 AWB AWB 12 12
30 30 ABB ABB 13 13
PULSE P.C.Board
IC2
ROM
IC1
X100 IC111-115.
IC15,18,19
55 8
36MHz
FF &
VCO
FF_36MC
BUFF
FF_36MA
BUFF
FF_36MB
FF_36MC IC15,16,17
9
FF &
FF_36MC
BUFF
TIMMING
GENE
IC5,6,7,8
FF &
FF_36MB
BUFF
DA DATA
DA DATA
CONTROL
&
SELECT
IC103
IC104
TEST
SIG D/A BUFF
GENE
A-5V
A+3V
P1 P401
R,G,B_DS 6A-8A 6A-8A
R,G,B_WS 17A-19A 17A-19A
SCLK 29B 29B
SDATA 29A 29A
PPLD4 28B 28B
PPLD3 28A 28A
PPLD2 27B 27B
PPLD1 27A 27A
PALD1 26B 26B
DA DATA
DA DATA 26A 26A
+18dB 16B 16B
+12dB 16A 16A
TRAP_SW 15B 15B
FILM_SW 15A 15A
HCP 14B 14B
PPBLK 14A 14A
ACT 13B 13B
OBCP 13A 13A
TEST_H 10B 10B
TEST 10A 10A
GP 2A 2A
DRIVE P.C.Board
P7 P1
H GATE 27A 27A
P1
P7
R GATE 29A 29A
P7 P1
VB1-4 9A-12A 9A-12A
VB1-4 9B-12B 9B-12B
CH1,2 7B-8B 7B-8B
GP
IC1
1
2
3
P7 P1
20
4
SDATA DRV 2B 2B
19
5
SCLK DRV 2A 2A
18
8bit D/A 6
LD DRV1 4A 4A
17 EE- 7
DA DATA 3B 3B
PROM
8
9
12
P7 P1
LD CCD 3A 3A
LD TEMP 4B 4B
TEST
Q102
REG +16V
Q103
P7 P1
A-5V 25A 25A A-5V
REG +16V
A+3V 24A 24A +3V
Q107
C+17V 14A 14A
C-11V 15A 15A REG -9V
C+5.6V 16A 16A
Q105
C-5.6V 18A 18A -5.6V
REG +5V
Q109
REG +5V
IC2
P2 P1
HP 14 14 BUFF
+HPP
IC1
P2 P1
RP 10 10 BUFF
+RAC
P2 P1
VB1-4 41-44 41-44
VB1-4 45-48 45-48
CH1,2 39-40 39-40
P2 P1
<R_SUB>
R SUB 32 32
<G_SUB>
G SUB 33 33
<B_SUB>
B SUB 35 35
<R_OG>
R OG 23 23
<G_OG>
G OG 24 24
<B_OG>
B OG 26 26
<R_RDC>
R RDC 27 27
<G_RDC>
G RDC 29 29
<B_RDC>
B RDC 30 30
P2 P1
<LG>
+LG 20 20
IC4
P2 P1
SDATA 6 6
EE ROM
SCLK 4 4
DA DATA 7 7
LD CCD 5 5
IC3
LD TEMP 3 3
TEMP
SENSER
P2 P1
+16V 31 31 +16V
P2 P1
+VH 36 36 +VH
P2 P1
-VL
-VL 34 34
P2 P1
+HPP 14 14
+HPP
P2 P1
+RAC 12 12 +RAC
P2 P1
+3V
+3V 19 19 +3V
CCD P.C.Board
IC105
IC102,103
H1
BUFF
H2
IC104,D103
RG
BUFF
IC100,101
R CCD
V1-V8
V DRIVE
BUFF
+VH,-VL,+3V
SUB
OG
LG
+16V
IC205
IC202,203
H1
BUFF H2
IC204,D203
RG
BUFF
IC200,201
G CCD
V1-V8
V DRIVE
BUFF
+VH,-VL,+3V
SUB
OG
LG
+16V
IC302,303 IC305
H1
BUFF
H2
IC304,D303
RG
BUFF
IC300,301
B CCD
V1-V8
V DRIVE
BUFF
+VH,-VL,+3V
SUB
OG
LG
+16V