Atmel AT91SAM9G45-EKES User Manual page 58

8 7
{4} EBI1_FLASH_D[0..15]
{4} EBI1_FLASH_A[1..21]
{4} EBI1_DDR_D[0..15]
{4} EBI1_DDR_A[2..15]
H8
EBI1_DDR_A2
A0
EBI1_DDR_A3 H3
A1
EBI1_DDR_A4 H7
A2
J2
EBI1_DDR_A5
D
A3
EBI1_DDR_A6 J8
A4
EBI1_DDR_A7 J3
A5
J7
EBI1_DDR_A8
A6
EBI1_DDR_A9 K2
A7
EBI1_DDR_A10 K8
A8
K3
EBI1_DDR_A11
A9
EBI1_DDR_A12 (SDA10) H2
A10
EBI1_DDR_A13 K7
A11
EBI1_DDR_A14 L2
A12
EBI1_DDR_A15 L8
A13
BA0_EBI1 G2
{4} BA0_EBI1 BA0
G3
BA1_EBI1
{4} BA1_EBI1
BA1
F9
ODT
F2
CKE_EBI1
{4} CKE_EBI1 CKE
CLK_EBI1 E8
{4} CLK_EBI1 CK
F8
NCLK_EBI1
{4} NCLK_EBI1 CK
CS_EBI1 (NCS1) G8
{4} CS_EBI1 CS
CAS_EBI1 G7
{4} CAS_EBI1 CAS
RAS_EBI1 F7
{4} RAS_EBI1 RAS
C
W E_EBI1 F3
{4} W E_EBI1 WE
G1
RFU1
L3
RFU2
L7
RFU3
{4} EBI1_NAND_FSH_D[0..15]
{3} PC5
{3,4} PC4
{3} EBI1_NANDOE
B
{3} EBI1_NANDW E
{3} PC14
{3} PC8
A
8 7
6
MN8 MN8
C8
EBI1_DDR_D0
DQ0
DDR2 SDRAM DDR2 SDRAM C2 EBI1_DDR_D1
DQ1
D7 EBI1_DDR_D2
MT47H64M8CF-3 MT47H64M8CF-3
DQ2
D3
EBI1_DDR_D3
DQ3
D1 EBI1_DDR_D4
DQ4
D9 EBI1_DDR_D5
DQ5
B1
EBI1_DDR_D6
DQ6
B9 EBI1_DDR_D7
DQ7
B7
DQS0_EBI1 {4}
DQS
A8
DQS
B3
DQM0_EBI1 {4}
RDQS/DM
A2
RDQS/NU
1V8
A1
C80 C80 100nF 100nF
VDD
E9
C82 C82 100nF 100nF
VDD
H9
VDD C84 C84 100nF 100nF
L1
C86 C86 100nF 100nF
VDD
E1
C88 C88 100nF 100nF
VDDL
A9
C90 C90 100nF 100nF
VDDQ
C1
C92 C92 100nF 100nF
VDDQ
C3
C94 C94 100nF 100nF
VDDQ
C7
C96 C96 100nF 100nF
VDDQ
C9
C98 C98 100nF 100nF
VDDQ
E2 VREF1
VREF
A3 C101 C101
VSS
E3 100nF 100nF
VSS
J1
VSS
K9
VSS
A7
VSSQ
B2
VSSQ
B8
VSSQ
D2
VSSQ
D8
VSSQ
E7
VSSDL
(NANDCLE)
(NANDALE)
R42 R42 0R 0R RE
JP10 JP10 0R 0R W E
R43 R43
(NCS3) CE
R46 R46 470K 470K
1V8
(RDY/BSY)
R44 R44 0R 0R RB
1K 1K
R45 R45
W P
1V8
R41 R41 470K 470K
R47 R47
DNP DNP
6
5 4
MN9 MN9
H8 C8
EBI1_DDR_A2 EBI1_DDR_D8
A0 DQ0
EBI1_DDR_A3 H3 DDR2 SDRAM DDR2 SDRAM C2 EBI1_DDR_D9
A1 DQ1
EBI1_DDR_A4 H7 D7 EBI1_DDR_D10
MT47H64M8CF-3 MT47H64M8CF-3
A2 DQ2
J2 D3
EBI1_DDR_A5 EBI1_DDR_D11
A3 DQ3
EBI1_DDR_A6 J8 D1 EBI1_DDR_D12
A4 DQ4
EBI1_DDR_A7 J3 D9 EBI1_DDR_D13
A5 DQ5
J7 B1
EBI1_DDR_A8 EBI1_DDR_D14
A6 DQ6
EBI1_DDR_A9 K2 B9 EBI1_DDR_D15
A7 DQ7
EBI1_DDR_A10 K8
A8
K3 B7
EBI1_DDR_A11
A9 DQS
EBI1_DDR_A12 (SDA10) H2 A8
A10 DQS
EBI1_DDR_A13 K7
A11
EBI1_DDR_A14 L2 B3
A12 RDQS/DM
EBI1_DDR_A15 L8 A2
A13 RDQS/NU
1V8
BA0_EBI1 G2 A1
BA0 VDD
G3 E9
BA1_EBI1
BA1 VDD
H9
VDD
L1
VDD
F9
ODT
E1
VDDL
F2 A9
CKE_EBI1
CKE VDDQ
C1
VDDQ
CLK_EBI1 E8 C3
CK VDDQ
F8 C7
NCLK_EBI1
CK VDDQ
C9
VDDQ
CS_EBI1 G8 E2 VREF1
CS VREF
CAS_EBI1 G7 A3
CAS VSS
RAS_EBI1 F7 E3
RAS VSS
J1
VSS
W E_EBI1 F3 K9
WE VSS
A7
VSSQ
B2
VSSQ
G1 B8
RFU1 VSSQ
L3 D2
RFU2 VSSQ
L7 D8
RFU3 VSSQ
E7
VSSDL
MN11 MN11
D5 H4 EBI1_NAND_FSH_D0
CLE I/O0
C4 J4 EBI1_NAND_FSH_D1
NAND FLASH NAND FLASH
ALE I/O1
D4 K4
EBI1_NAND_FSH_D2
RE I/O2
C7 MT29F2G08ABD MT29F2G08ABD K5 EBI1_NAND_FSH_D3
WE I/O3
C6 K6 EBI1_NAND_FSH_D4
CE I/O4
J7 EBI1_NAND_FSH_D5
I/O5
C8 K7
EBI1_NAND_FSH_D6
R/B I/O6
J8 EBI1_NAND_FSH_D7
I/O7
C3 H3 EBI1_NAND_FSH_D8
WP N.C26
J3
EBI1_NAND_FSH_D9
N.C27
G5 H5 EBI1_NAND_FSH_D10
LOCK N.C28
J5 EBI1_NAND_FSH_D11
N.C29
H6
EBI1_NAND_FSH_D12
N.C30
A1 G6 EBI1_NAND_FSH_D13
N.C1 N.C31
A2 H7 EBI1_NAND_FSH_D14
N.C2 N.C32
A9 G7
EBI1_NAND_FSH_D15
N.C3 N.C33
A10
N.C4
B1
N.C5
B9 L9
N.C6 N.C34
B10 L10
N.C7 N.C35
D6 M1
N.C8 N.C36
D7 M2
N.C9 N.C37
D8 M9
N.C10 N.C38
E3 M10
N.C11 N.C39
E4
N.C12
1V8
E5
N.C13
E6 D3
N.C14 VCC C103 C103 100nF 100nF
E7 G4
C104 C104 100nF 100nF
N.C15 VCC
E8 H8
C105 C105 100nF 100nF
N.C16 VCC
F3 J6
C106 C106 100nF 100nF
N.C17 VCC
F4
N.C18
F5
N.C19
F6
N.C20
F8 C5
N.C21 VSS
G3 F7
N.C22 VSS
G8 K3
N.C23 VSS
L1 K8
N.C24 VSS
L2
N.C25
VFBGA-63 VFBGA-63
MT29F2G08ABDHC:D MT29F2G08ABDHC:D
5 4
3
EBI1_FLASH_A1
EBI1_FLASH_A2
EBI1_FLASH_A3
EBI1_FLASH_A4
EBI1_FLASH_A5
EBI1_FLASH_A6
EBI1_FLASH_A7
EBI1_FLASH_A8
EBI1_FLASH_A9
EBI1_FLASH_A10
DQS1_EBI1 {4}
EBI1_FLASH_A11
EBI1_FLASH_A12
EBI1_FLASH_A13
DQM1_EBI1 {4}
EBI1_FLASH_A14
EBI1_FLASH_A15
EBI1_FLASH_A16
C81 C81 100nF 100nF
EBI1_FLASH_A17
C83 C83 100nF 100nF
EBI1_FLASH_A18
C85 C85 100nF 100nF
EBI1_FLASH_A19
C87 C87 100nF 100nF
EBI1_FLASH_A20
EBI1_FLASH_A21
C89 C89 100nF 100nF
C91 C91 100nF 100nF
R39 R39 100K 100K
C93 C93 100nF 100nF
C95 C95 100nF 100nF 1V8
C97 C97 100nF 100nF
{3} EBI1_NW E/NW R0/CFW E
C99 C99 100nF 100nF
{3} EBI1_NRD/CFOE
C102 C102
100nF 100nF
{3} EBI1_NCS0
VREF1
{3,5} DDR_VREF
Optional 16bits DATA BUS
With AT29F2G16ABD Micron
AT91SAM9M10-EKES AT91SAM9M10-EKES AT91SAM9M10-EKES
AT91SAM9G45-EKES AT91SAM9G45-EKES AT91SAM9G45-EKES
EBI1_MEMORY EBI1_MEMORY EBI1_MEMORY
3
2 1
MN10 MN10
E1 E2
EBI1_FLASH_D0
A0 I/00
D1 H2 EBI1_FLASH_D1
A1 I/O1
C1 FLASH FLASH E3 EBI1_FLASH_D2
A2 I/O2
A1 H3
EBI1_FLASH_D3
A3 I/O3
B1 AT49SV322DT AT49SV322DT H4 EBI1_FLASH_D4
A4 I/O4
D2 E4 EBI1_FLASH_D5
A5 I/O5
C2 H5
EBI1_FLASH_D6
A6 I/O6
A2 E5 EBI1_FLASH_D7
A7 I/O7
B5 F2 EBI1_FLASH_D8
A8 I/O8
A5 G2
EBI1_FLASH_D9
A9 I/O9
C5 F3 EBI1_FLASH_D10
A10 I/O10
D5 G3 EBI1_FLASH_D11
A11 I/O11
B6 F4 EBI1_FLASH_D12
A12 I/O12
A6 G5 EBI1_FLASH_D13
A13 I/O13
C6 F5 EBI1_FLASH_D14
A14 I/O14
D6 G6 EBI1_FLASH_D15
A15 I/O15
E6
A16
B2
A17
C3 A3
A18 RDY/ BUSY
D4
A19
D3
A20
C4
NC1
F6
NC
B4
RESET
A4 1V8
WE
G4
VCC
B3 C100 C100
1V8
VPP
F1 H1 100nF 100nF
CE GND
G1 H6
OE GND
CBGA CBGA
DNP DNP
JP9 JP9
R40 R40 470K 470K
1V8
E E E LN LN LN 03-sep-09 03-sep-09 03-sep-09
PP PP PP 22-jun-09 22-jun-09 22-jun-09
D D D
C C C PP PP PP 02-DEC-08 02-DEC-08 02-DEC-08
B B B PP PP PP 29-JUL-08 29-JUL-08 29-JUL-08
A A A INIT EDIT INIT EDIT INIT EDIT PP PP PP 26-MAY-08 26-MAY-08 26-MAY-08 XXX XXX XXX XX-XXX-XX XX-XXX-XX XX-XXX-XX
REV REV REV MODIF. MODIF. MODIF. DES. DES. DES. DATE DATE DATE VER. VER. VER. DATE DATE DATE
1/1 1/1 1/1
SCALE SCALE SCALE REV. REV. REV. SHEET SHEET SHEET
6 6 6
E E E
12 12 12
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings. This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
2 1
D
C
B
A