Table 21: Auxdir – Aux Gpio Direction Control Register - VersaLogic Viper Programmer's Reference Manual

Intel atom-based single board computer with dual ethernet, video, usb, sata, serial i/o, digital i/o, analog i/o, trusted platform module security, counter/timers, mini pcie, msata, pc/104-plus interface, and spx
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FPGA Registers
AUXDIR – AUX GPIO Direction Control Register
This register controls the direction of the eight AUX GPIO signals.
This reset depends on the state of the AUX_PSEN signal. If AUX_PSEN is a '0' then the reset is
the power-on and Platform Reset. If AUX_PSEN is a '1' then this register is only reset at power-
on.
Table 21: AUXDIR – AUX GPIO Direction Control Register
Bit
Identifier
7-0
DIR_GPIO[8:1]
AUXPOL – AUX GPIO Polarity Control Register
This register controls the polarity of the eight AUX GPIO signals.
This reset depends on the state of the AUX_PSEN signal. If AUX_PSEN is a '0' then the reset is
the power-on and Platform Reset. If AUX_PSEN is a '1' then this register is only reset at power-
on.
Table 22: AUXPOL – AUX GPIO Polarity Control Register
Bits
Identifier
7-0
POL_GPIO[8:1]
AUXOUT – AUX GPIO Output Control Register
This register sets the AUX GPIO output value. This value will only set the actual output if the
GPIO direction is set as an output. Reading this register does not return the actual input value of
the GPIO (use the AUXIN register for that). As such, this register can actually be used to detect
input/output conflicts.
This reset depends on the state of the AUX_PSEN signal. If AUX_PSEN is a '0' then the reset is
the power-on and Platform Reset. If AUX_PSEN is a '1' then this register is only reset at power-
on.
Table 23: AUXOUT – AUX GPIO Output Control Register
Bits
Identifier
7-0
OUT_GPIO[8:1]
26
Access
Default
Sets the direction of the AUX GPIOx lines. For each bit:
R/W
0
0 – Input
1 – Output
Access
Default
Sets the polarity of the AUX GPIOx lines. For each bit:
0 – No inversion
R/W
0
1 – Invert
Note: This impacts the polarity as well as the interrupt status
edge used.
Access
Default
Sets the AUX GPIOx output values. For each bit:
R/W
0 – De-asserts the output (0 if polarity not-inverted, 1 if inverted)
0
1 – Asserts the output (1 if polarity not-inverted, 0 if inverted)
Description
Description
Description
VL-EBX-38 Programmer's Reference Manual

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