Table 18: Dioimask1 – Digital I/O 8-1 Interrupt Mask Register - VersaLogic Viper Programmer's Reference Manual

FPGA Registers
DIOIMASK1 – Digital I/O Interrupt Mask Register
This is the interrupt mask register for the digital I/Os (the two SPI devices share a common
interrupt input).
Reset type is Platform.
Table 18: DIOIMASK1 – Digital I/O 8-1 Interrupt Mask Register
Bits Identifier
7-1 RESERVED
0 IMASK_DIO1
DIOISTAT1 – Digital I/O Interrupt Status Register
Reset type is Platform
Table 19: DIOISTAT1 – Digital I/O 8-1 Interrupt Status Register
Bits Identifier
7-1 RESERVED
0 ISTAT_DIO1
24
Access Default
RO 0's
Reserved – Writes are ignored. Reads always return 0's
Digital I/O Interrupt Mask:
R/W
0
0 – Interrupt disabled
1 – Interrupt enabled.
Access Default
0's
RO
Reserved – Writes are ignored. Reads always return 0's
N/A
DIOx interrupt status. A read returns the interrupt status. Writing a '1'
RW/C
will clear the interrupt status. This bit is set to a '1' on a transition
from low-to-high on the shared interrupt input.
Description
Description
VL-EBX-38 Programmer's Reference Manual