Analog Devices EVAL-ADAU1466Z User Manual page 28

UG-1135
POWER SUPPLY
BULK DECOUPLING
1466_AVDD
1466_DVDD
1466_IOVDD
D_3V3
C64 C21
10µF
10µF
C63
22pF
Y1
12.288MHz
C73
R51
22pF
100Ω
1466_CLKOUT
RESET
SS_M/MP0
MOSI_M/MP1
SCLK_M
MISO_M
MISO
SCLK
MOSI
SS
SELFBOOT
SIGMADSP AUDIO PROCESSOR
PLL LOOP FILTER
C5
5.6nF
C4
A_3V3
150pF
1466_PVDD
A_3V3
C89 C59
10µF 10µF
C9
0.10µF
C10 C11
0.10µF 10nF
19
DGND
20
DVDD
21
XTALIN/MCLK
R46 22
XTALOUT
33.2Ω
23
CLKOUT
24
RESET
25
DGND
26
SS_M/MP0
27
MOSI_M/MP1
28
SCL_M/SCLK_M/MP2
29
SDA_M/MISO_M/MP3
30
MISO/SDA
31
SCLK/SCL
32
MOSI/ADDR1
33
SS/ADDR0
34
SELFBOOT
35
DVDD
36
DGND
0.10µF 10nF
C14 C15
0.10µF
C18
MP5
MP6
MP7
MP8
ADAU1466 IS
Figure 79. SigmaDSP
DVDD REGULATOR CIRCUIT
B
1
R4
4.32kΩ
R26
1kΩ
C7 0.10µF
C6 0.10µF
C8
0.10µF
PIN 1
DGND
DVDD
SDATA_IN3
ADAU1466 LRCLK_IN3/MP13
BCLK_IN3
U3
SDATA_IN2
ADAU1466WBCPZ
LRCLK_IN2/MP12
ADAU1466WBCPZ
BCLK_IN2
THD_P
THD_M
SDATA_IN1
LRCLK_IN1/MP11
BCLK_IN1
SDATA_IN0
LRCLK_IN0/MP10
BCLK_IN0
IOVDD
DGND
10nF
C19
C22 0.10µF
TP45 TP48
R5
33RΩ
DAC CLOCK
MASTER
Audio Processor Schematic
Rev. 0 | Page 28 of 45
EVAL-ADAU1466Z
C
R25
2 0Ω
Q1
3 STD2805
E
STD2805T4
10nF 0.10µF
72
71
2x3
70 6 5
69 4 3
68 2 1
67 6 5
66 4 3
65 2 1
64
TP27 J2 J3
63
TP26
62
SDATA_IN1
61
60
59
SDATA_IN0
58
57
56
ADAU1466 IS
55
ADC CLOCK
MASTER
C16
0.10µF
1466_DVDD
1466_IOVDD
GND
MP9
User Guide
MP11