Analog Devices EVAL-ADAU1466Z User Manual page 12

UG-1135
To add an S/PDIF input and output to the project in SigmaStudio,
take the following steps:
1. Connect an S/PDIF source to the EVAL-ADAU1466Z
evaluation board by using a standard TOSLINK® optical
cable and connecting it to the S/PDIF receiver connector,
U2 (see Figure 33).
Figure 33. Photograph of the Optical S/PDIF Input Connection
2. Configure the S/PDIF input and output by modifying the
ADAU1466 registers as follows:
a. Click the Hardware Configuration tab, then click the
IC 1 – ADAU146x Register Controls tab at the
bottom of the window (see Figure 34).
Figure 34. IC 1 - ADAU146x Register Controls Tab
b. Click the SPDIF tab (see Figure 36). There are several
register control tabs listed across the top of the window.
To access the SPDIF tab, click the right arrow to scroll
(see Figure 35).
Figure 35. Using the Register Tab Scroll Button
Figure 36. Selecting the SPDIF Tab
c. Enable the SPDIF_RESTART register by clicking Do
not restart the audio once a re-lock has occurred in
the SPDIF RESTART box. When this button is clicked,
the text displayed on the button changes to Restarts
the audio once a re-lock has occurred and the button
color changes from red to green (see Figure 37).
Figure 37. Activating the SPDIF_RESTART Register
d. To activate the S/PDIF interface, click Disabled in the
SPDIF TX EN box. When this button is clicked, the text
displayed on the button changes to Enabled and the
button color changes from red to green (see Figure 38).
Figure 38. Activating the SPDIF_TX_EN Register
3. Click the ROUTING_MATRIX tab (see Figure 39) to
allow the configuration of the routing matrix.
Figure 39. Selecting the ROUTING_MATRIX Tab
4. To configure the S/PDIF receiver signal routing, click the
first asynchronous sample rate converter, ASRC 0 (see
Figure 40) and configure ASRC 0 using the dropdown menus
until it matches Figure 41. This configuration routes the
S/PDIF receiver signal through an ASRC before it is accessed
in the DSP core. Routing the signal in this way is necessary
because the clock recovered from the S/PDIF source is not
synchronous to the ADAU1466.
Figure 41. Configuring the ASRC 0 Routing Matrix Registers
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EVAL-ADAU1466Z
Figure 40. ASRC 0 Control Button
User Guide