Table of Contents
Advertisement
Chapter 1: KC724 IBERT Getting Started Guide
X-Ref Target - Figure 1-1
All GTX transceiver pins and reference clock pins are routed from the FPGA to a connector
pad which interfaces with Samtec BullsEye connectors.
pad.
8
QUAD_116
QUAD_115
Figure 1-1: GTX Quad Locations
Figure 1-2
shows the connector pinout.
B
www.xilinx.com
QUAD_117
QUAD_118
Figure 1-2
KC724 IBERT Getting Started Guide
UG930 (v1.0) October 23, 2012
UG930_c1_01_061412
shows the connector
A
Advertisement
Table of Contents
