Xilinx KC724 IBERT Getting Started Manual page 15

1.
X-Ref Target - Figure 1-12
2.
X-Ref Target - Figure 1-13
KC724 IBERT Getting Started Guide
UG930 (v1.0) October 23, 2012
In the Project Panel, click VIO Console below UNIT 1: SCLK2 Control (VIO)
(Figure 1-12).
Figure 1-12: Project Panel - VIO Console (GTX)
The clock sources on the SuperClock-2 module are controlled from the VIO Console.
Click on the Si5368 Start button
Note:
The ROM address values for the Si5368 and Si570 devices (i.e., Si5368 ROM Addr and
Si570 ROM Addr) are preset to 19 to produce an output frequency of 125.000 MHz. Entering a
different ROM address changes the reference clock(s) frequency. The complete list of
pre-programmed SuperClock-2 frequencies and their associated ROM addresses is provided in
Table 1-2, page 19.
Figure 1-13: Si5368 Address, Frequency and Start Button
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Running the GTX IBERT Demonstration
UG930_c1_12_101112
(Figure 1-13) to enable the clock output.
The ROM address value for the
Si5368 clock multiplier is preset to 19
(125.000 MHz)
Si5368 start button
UG930_c1_13_101112
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