Chipset Configuration; North Bridge - Supermicro X11SPW-CTF User Manual


CPU C State Control
Autonomous Core C-State
Enabling this setting allows the hardware to autonomously choose to enter a C-state
based on power consumption and clock speed. The options are Disable and Enable.
CPU C6 Report
Select Enable to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating
system. During the CPU C6 State, the power to all cache is turned off. The options are
Disable, Enable, and Auto.
Enhanced Halt State (C1E)
Select Enable to use Enhanced Halt-State technology, which will significantly reduce
the CPU's power consumption by reducing the CPU's clock cycle and voltage during a
Halt-state. The options are Disable and Enable.

Package C State Control
Package C State
This feature allows the user to set the limit on the C State package register. The options
are C0/C1 State, C2 State, C6 (Non Retention) State, C6 (Retention) State, No Limit,
and Auto.

CPU T State Control
Software Controlled T-States
Use this feature to enable Software Controlled T-States. The options are Disable and
Enable.
Chipset Configuration
Warning: Setting the wrong values in the following features may cause the system to malfunc-
tion.


North Bridge

This feature allows the user to configure the following North Bridge settings:
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Chapter 4: BIOS