Chipset Configuration; North Bridge - Supermicro X11DPL-i User Manual

CPU C6 Report
Select Enabled to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating
system. During the CPU C6 State, the power to all cache is turned off. The options are
Disable and Enable.
Enhanced Halt State (C1E)
Select Enabled to use Enhanced Halt-State technology, which will significantly reduce the
CPU's power consumption by reducing the CPU's clock cycle and voltage during a Halt-state.
The options are Disable and Enable.
Package C State Control
Package C State
This feature allows the user to set the limit on the C State package register. The options are
C0/C1 State, C2 State, C6 (Non Retention) State, C6 (Retention) state, No Limit, and Auto.
CPU T State Control
Software Controlled T-States
Enabling this feature allows the OS to choose a T-State. The options are Enable and
Disable.
Chipset Configuration
Warning: Setting the wrong values in the following features may cause the system to malfunc-
tion.
North Bridge
This feature allows the user to configure the following North Bridge settings.

UPI Configuration

UPI General Configuration
UPI Status
The following UPI information will display:
•
Number of CPU
•
Number of IIO
•
Current UPI Link Speed
77
Chapter 4: BIOS