8-Bit Basic Timer (Tim4, Tim6); Introduction; Figure 89. Tim4 Block Diagram; Figure 90. Tim6 Block Diagram - ST STM8S Reference Manual

RM0016
19

8-bit basic timer (TIM4, TIM6)

19.1

Introduction

The timer consists of an 8-bit auto-reload up-counter driven by a programmable prescaler. It
can be used for time base generation, with interrupt generation on timer overflow.
TIM6 is implemented with the clock/trigger controller for timer synchronization and chaining.
Refer to

Figure 89. TIM4 block diagram

f
MASTER
Legend:
Preload registers transferred
Reg
to shadow registers on update
event (UEV) according to
control bit
event
interrupt

Figure 90. TIM6 block diagram

f
MASTER
TRGO from TIM5 (ITR2)
TRGO from TIM1 (ITR3)
Legend:
Preload registers transferred
Reg
to shadow registers on update
event (UEV) according to
control bit
event
interrupt
Section 17.3 on page 139
ITR = TRC = TRGI
Doc ID 14587 Rev 8
for the general description of the timer features.
TIME BASE UNIT
UEV
Stop or Clear
CK_PSC CK_CNT
Prescaler
CLOCK/TRIGGER CONTROLLER
TGI
TIME BASE UNIT
UEV
CK_PSC
CK_CNT
Prescaler
8-bit basic timer (TIM4, TIM6)
UIF
Auto-reload register
UEV
UP-COUNTER
TIM6_TRGO
UIF
Auto-reload register
UEV
UP-COUNTER
To TIM1/TIM5 timers
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