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JTAG
The EVM also provides a separate connector to support the full five-pin JTAG interface of the TLK3134
as defined in IEEE 1149.1 for manufacturing tests.
TDI:
This pin is the JTAG Input Data pin and is used to serially shift test data and test
instructions into the device during the operation of the test port.
TDO: This pin is the JTAG Output Data pin and is used to serially shift test data and test
instructions out of the device during operation of the test port. When JTAG port is not in use,
TDO is in a high impedance state.
TMS: This pin is the JTAG Mode Select pin and is used to control the state of the internal test-
port controller.
TCK: This is the JTAG Clock pin and is used to clock state information and test data into and
out of the device during the operation of the test port.
TRST_N: This is the JTAG Test Reset pin and is used to reset the JTAG logic into system
operational mode. NOTE: TRST_N should be tied low when the JTAG port is not in use and
during normal operation of the port as shown in the following figure.
TLK3134 XAUI Transceiver / 4 Channel Multi-Rate Transceiver Evaluation Module (EVM) Users' Guide
SLLU104A - September 2007
Figure 10. TLK3134 EVM JTAG Connector (JMP23)
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