Reset
The TLK3134 EVM comes configured for Manual Reset operations involving the Pushbutton
Reset Switch (SW1). When switch SW1 is pressed, the TLK3134 device RESET pin (RST_N)
goes LOW and the entire TLK3134 device is reinitialized. A TI TPS3125J18 Ultra Low Voltage
Processor Supervisory Circuit is used to control the Reset line. During power-on, /RESET pin of
U2 is asserted when the supply voltage becomes higher than 0.75V. Thereafter, the supply
voltage supervisor monitors the voltage and keeps /RESET output active as long as the Voltage
remains below the threshold voltage (V
inactive state (high) to ensure proper system reset. The delay time, t
voltage has risen above the threshold voltage (V
There is also a manual reset input to the supervisory circuit, /MR, which accepts the input from
the pushbutton switch SW1. A low level at /MR causes /RESET to become active, thus resetting
the TLK3134 device whenever the pushbutton RESET is pressed. By placing a jumper on
JMP11, the Manual Reset (/MR) is tied hard to ground causing the TLK3134 to be held in a
constant state of Reset without the need to continually hold the Reset Pushbutton SW1. The
Supervisory circuit will release the Reset line to a HIGH 180mS (t
becomes greater than the threshold voltage (V
By removing the jumper from JMP10, the Supervised Reset Circuit is disconnected from the
RST_N line. Reset control from an external controller or piece of equipment can be connected
directly to pin 2 (RST_N) of JMP10 and a ground pin GND has been added to the JMP10 header
next to the RST_N pin to allow easy access for the return current on that cable.
NOTE: The Jumper on JMP10 connecting RESET SW to RST_N must be connected as shown
in order to cause the TLK3134 to be reset and reinitialized If switch SW1 is pressed, the device
RESET pin (RST_N) goes LOW, the entire TLK3134 device is reinitialized.
18
TLK3134 XAUI Transceiver / 4 Channel Multi-Rate Transceiver Evaluation Module (EVM) Users' Guide
SLLU104A - September 2007
IT
Figure 11. RESET Switch (SW1, JMP10, or JMP11)
). An internal timer delays the return of the output to the
).
IT
).
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= 180ms, starts after the
d
) from the time the /MR line
d