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Summary of Contents for Texas Instruments TLV1544EVM
- Page 1 TLV1544EVM Evaluation Module for the TLV1544 10 Bit ADC User’s Guide 1998 Mixed-Signal Products...
- Page 2 Printed in U.S.A. SLAU014 08/98...
- Page 3 TLV1544EVM Evaluation Module for the TLV1544 10-Bit ADC User’s Guide Literature No. SLAU014 August 1998 Printed on Recycled Paper...
- Page 4 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current.
- Page 5 Preface Read This First About This Manual This User’s Guide describes the characteristics, operation, and use of the TLV1544EVM Evaluation Moduale for the TLV1544 10-Bit Analog-to-Digital Converter (ADC). How to Use This Manual This document contains the following chapters: Chapter 1 Overview...
- Page 6 Trademarks TI is a trademark of Texas Instruments Incorporated. SPI and QSPI are trademarks of Motorola, Inc.
- Page 7 When making suggestions or reporting errors in documentation, please include the following information that is on the title page: the full title of the book, the publication date, and the literature number. Mail: Texas Instruments Incorporated Product Information Center, MS 3123 P.O.
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Page 9: Table Of Contents
..........TLV1544EVM Operational Procedure . - Page 10 Running Title—Attribute Reference Figures 2–1 PCB Layout ..............2–2 PCB Layout .
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Page 11: Overview
Chapter 1 Overview This chapter gives a general overview of the TLV1544EVM Evaluation Module (EVM), and describes some of the factors that must be considered in using the module. Topic Page Purpose ............ -
Page 12: Purpose
1.2 EVM Basic Function There are four analog inputs to the TLV1544EVM, three of these are available for external inputs through BNC connectors. The internal analog input consists of an operational amplifier with a potentiometer for observing simple dc measurements. -
Page 13: Power Requirements
Power Requirements 1.3 Power Requirements The EVM operates properly over a balanced input voltage range of 10 volts maximum to 7 volts minimum. The power supply and externally applied refer- ence voltage should be supplied to the EVM through shielded twisted-pair wire for best performance. -
Page 14: I/O Interface Connector Provisions
The two rows of plated-through holes, designated as JPA shorting jumpers, allow the on board signals to connect externally in a variety of user defined selections. Using these jumpers, the TLV1544EVM I/O signals can be conve- niently connected to an existing hardware (DSP EVMs, microprocessor EVM, micro-controller EVMs, etc.) by appropriate jumper placement. -
Page 15: Tlv1544Evm Operational Procedure
TLV1544EVM Operational Procedure 1.7 TLV1544EVM Operational Procedure Some signal setup or software is required for the TLV1544EVM. The TLV1544 data sheet provides the timing requirements and the application report (litera- ture number SLAA025) supplies an example of software using the TMS320C50 DSP. - Page 16 Overview...
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Page 17: Physical Description
Chapter 2 Physical Description This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module. Topic Page PCB Layout ..........Components List . -
Page 18: Pcb Layout
PCB Layout 2.1 PCB Layout The EVM is constructed on a 4-layer, 3-inch x 5.25-inch, 0.062-inch thick PCB using FR-4 material. Figures 2–1 through 2–5 show the individual layers. Figure 2–1. PCB Layout Physical Description... -
Page 19: Pcb Layout
PCB Layout Figure 2–2. PCB Layout Physical Description... -
Page 20: Pcb Layout
PCB Layout Figure 2–3. PCB Layout Physical Description... -
Page 21: Pcb Layout
PCB Layout Figure 2–4. PCB Layout Physical Description... -
Page 22: Pcb Layout
PCB Layout Figure 2–5. PCB Layout Physical Description... -
Page 23: Component List
Component List 2.2 Component List Table 2–1 lists the components used in constructing the EVM. Table 2–1. Component List Reference Designator Description Manufacturer Part Number , 1%, 1206 SMD Panasonic ERJ-8ENF1780 R21, R22 , 1%, 1206 SMD Panasonic ERJ-8ENF1001 6.34 k , 1%, 1206 SMD Panasonic ERJ-8ENF6341... - Page 24 Component List Table 2–1. Component List (Continued) Reference Description Manufacturer Part Number Designator 10-bit serial out ADC TLV1544CD Octal buffer and line driver SN74AHC244DW Low dropout adjustable regulator TPS7101QD 5-V rail-to-rail op amp TLV2432AID Bipolar op amp TLE2027ACD Adjustable voltage reference TL1431CD Micro inverter SN74AHC1G04DBVR...
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Page 25: Circuit Description
Chapter 3 Circuit Description This chapter contains the EVM schematic diagram and discusses the various functions on the EVM. Topic Page Schematic Diagram ......... . . 3–2 Circuit Function . -
Page 26: Evm Schematic Diagram
Schematic Diagram 3.1 Schematic Diagram Figure 3–1 shows the schematic diagram for the EVM. The following paragraphs describe the EVM circuits. Figure 3–1. EVM Schematic Diagram Circuit Description... -
Page 27: Circuit Function
Circuit Function 3.2 Circuit Function The following paragraphs describe the function of individual circuits. 3.2.1 Inputs The ADC has four analog inputs; A0, A1, A2, and A3. The EVM connects to these inputs as follows: A0. One op amp of a single-supply TLV2232 dual op amp drives the A0 input with an onboard-adjustable dc voltage. -
Page 28: Unbuffered Analog Inputs
Circuit Function Figure 3–2. Generation of AVdd/2 with Buffer for Channel A1 Input Biasing with JP6 Removed TLE2027 Channel A1 To A1 Input † 10 kΩ 10 kΩ 100 pF 10 kΩ { TP15 TP14 TP16 1/2 TLV2432 10 kΩ { †... -
Page 29: Test Connector J7
Circuit Function for a 5-volt or 2.7-volt V such that ADC evaluation can be done at either VDD through switch SW1. SW1 adjusts the TL1431 voltage reference to accommo- date the change in V ; SW1 also changes the SN74HC244 V to 2.7 volts. -
Page 30: Jumper Arrangement
Circuit Function 3.2.8 Jumper Arrangement The EVM evaluation can begin with the following shorting plug arrangement. JP1 connected to AVdd (2 and 3 shorted) JP2 connected to ground (2 and 3 shorted) JP3 shorted JP4 shorted JP5 open JP6 shorted Circuit Description... -
Page 31: Operation
Chapter 4 Operation This chapter describes the basic operation of the EVM with a host DSP or processor. Topic Page TLV1544 Overview ..........Microprocessor Serial Interface . -
Page 32: Functional Block Diagram
TLV1544 Overview 4.1 TLV1544 Overview The following paragraphs describe the TLV1544 10-bit ADC. 4.1.1 Description The TLV1544 is a CMOS 10-bit switched-capacitor successive approximation ADC. Figure 4–1 shows the functional block diagram for the device. The device has a chip-select (CS), input-output clock (I/O CLK), data input (DATA IN) and serial data output (DATA OUT). -
Page 33: Microprocessor Interface Timing (Normal Sample Mode, Inv Clk = High)
TLV1544 Overview Figure 4–2. Microprocessor Interface Timing (Normal Sample Mode, INV CLK = High) Address Sampled Conversion Starts on 10th I/O CLK Rise After 10th I/O CLK Conversion t d(EOC -CS ) Sample Access (6 I/O CLKs) (see Note A) I/O CLK Î... -
Page 34: Dsp Interface Timing (16-Clock Transfer, Normal Sample Mode, Inv Clk = High)
TLV1544 Overview Figure 4–4. DSP Interface Timing (16-Clock Transfer, Normal Sample Mode, INV CLK = High) Address Sampled Initialize Counter CS Rise After 16th I/O CLK Conversion Starts on 10th I/O CLK t d(EOC -CS ) Initialize State Machine 7 I/O CLKs Maximum Access Sample... -
Page 35: Tlv1544 Serial Interface Modes
TLV1544 Overview Figure 4–5. DSP Interface Timing (16-Clock Transfer, Normal Sample Mode, INV CLK = Low) Initialize Counter Address Sampled Conversion Starts on 10th I/O CS Rise After 16th I/O CLK Initialize State t d(EOC -CS ) Machine 7 I/O CLKs Maximum Access Sample... -
Page 36: Tlv1544 Terminal Functions
TLV1544 Overview 4.1.4 TLV1544 Terminal Functions Table 4–2 explains the terminal functions for the TLV1544. Table 4–2. Terminal Functions Terminal Description Name A0–A3 6–9 1–4 Analog inputs. The analog inputs are internally multiplexed. (For a source imped- A4–A7 – 5–8 ance greater than 1 kΩ, the asynchronous start should be used to increase the sampling time.) Chip select. - Page 37 TLV1544 Overview Table 4–2. Terminal Functions (Continued) Terminal Description Name I/O CLK Input/output clock. I/O CLK receives the serial I/O clock input in the two modes and performs the following four functions in each mode: Microprocessor mode When INVCLK = V , I/O CLK clocks the four input data bits into the input data register on the first four rising edges of I/O CLK after CS with the multiplexer address available after the fourth rising edges.
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Page 38: Microprocessor Serial Interface
Microprocessor Serial Interface 4.2 Microprocessor Serial Interface Input data bits from DATA IN are clocked in on the first four rising edges of the I/O CLK sequence if INV CLK is held high when the device is in microprocessor interface mode. Input data bits are clocked in on the first four falling edges of the I/O CLK sequence if INV CLK is held low. -
Page 39: Dsp Interface
DSP Interface 4.3 DSP Interface The TLV1544 can also interface with a DSP, from the TMS320 family for exam- ple, through a serial port. The analog-to-digital converter (ADC) serves as a slave device where the DSP supplies FS and the serial I/O CLK. Transmit and receive operations are concurrent. -
Page 40: Tlv1544 To Tms320C50
TLV1544 to TMS320C50 4.4 TLV1544 to TMS320C50 Figure 4–6 is the schematic diagram showing the hardware connections be- tween the TLV1544 and the TMS320C50. Figure 4–6. Schematic Diagram V CC = 5 V 4.7 µF 0.01 µF Analog Inputs TMS320C50 TLV1544 V CC 0.01 µF... -
Page 41: A Grounding Considerations
Appendix A Grounding Considerations This appendix contains general information on grounding techniques for a printed circuit board using the TLV1544. Topic Page Printed Circuit Board Grounding Considerations ....A–2 Grounding Considerations... -
Page 42: A.1 Printed Circuit Board Grounding Considerations
Printed Circuit Board Grounding Considerations A.1 Printed Circuit Board Grounding Considerations When designing analog circuits that share a ground with digital and high current power supplies, the voltage drop along the high current paths must be considered. This voltage drop is a result of the current flowing through the greater than zero resistance of the current path, or high frequency current transients flowing through a greater than zero inductance of a current path.
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