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TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps,
This user's guide describes the usage and construction of the TLK6002 evaluation module (EVM). This
document provides guidance on proper use of the EVM by showing some device configurations and test
modes. In addition, design, layout, and schematic information is provided to the user. Users can use
information in this guide to choose the optimal design methods and materials when designing a complete
system.
This equipment is intended for use in a laboratory test environment
only. It generates, uses, and can radiate radio frequency energy
and has not been tested for compliance with the limits of
computing devices pursuant to subpart J of part 15 of FCC rules,
which are designed to provide reasonable protection against radio
frequency interference. Operation of this equipment in other
environments may cause interference with radio communications,
in which case, users at their expense are required to take whatever
measures may be required to correct this interference.
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SLLU132 - October 2010
Multi-Rate Transceiver Evaluation Module
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List of Figures
TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver
Copyright © 2010, Texas Instruments Incorporated
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User's Guide
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Related Manuals for Texas Instruments TLK6002
Summary of Contents for Texas Instruments TLK6002
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Page 1: Table Of Contents
TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module This user’s guide describes the usage and construction of the TLK6002 evaluation module (EVM). This document provides guidance on proper use of the EVM by showing some device configurations and test modes. - Page 2 TLK6002 EVM Voltage Monitor LED Enabled Example ............. TLK6002 EVM Voltage Monitor LED Disabled Example ........TLK6002 EVM Voltage Monitor LED Connected Directly to Plane Example ........ Control Connectors (JMP17, JMP23, JMP26, JMP27, JMP29, JMP33, JMP43) ................TLK6002 EVM MDIO Connector (JMP30) ................
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Page 3: Sllu132 – October
Internal Power, Layer 16 ....................Bottom Signal, Layer 18 List of Tables ......................Bill of Materials ..................TLK6002EVM Layer Construction SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 4: Introduction
122.88 MHz or 153.6 MHz. Non-CPRI or OBSAI serial data rates between 0.470 Gbps and 6.25 Gbps are also supported. Each channel of the TLK6002 can be operated from a single, shared-reference clock or independently from separate reference clocks at different frequencies. A CIPRI/OBSAI Automated Rate Sense (ARS) Function has been included to help facilitate the determination of the incoming CPRI/OBSAI serial link rate per channel. -
Page 5: Evm Pcb And High-Speed Design Considerations
(LOS) detection of ≤ 75 mVdfpp are just a few of the other features supported in this device. Configuration of the TLK6002 on a per-channel basis is available by way of accessing a register space of control bits available through a two-wire access port called the Management Data Input/Output (MDIO) interface as defined in Clause 22 of the IEEE 802.3 Ethernet Specification. -
Page 6: Tlk6002 Evm Kit Contents
This loss must be less than 5 mV to 10 mV and not affect the operation of the TLK6002 device. If more information on the use of these regulators is desired, consult the regulator data sheets found at www.ti.com. -
Page 7: Tlk6002 Evm 1P5/8V Voltage Source Selection
1.5 V or 1.8 V depending on your specific setup. The EVM is designed to allow either of these voltages to be selected for use with the previously mentioned TLK6002 supply rails, but only allow either 1.5 V or 1.8 V to be selected at a time without some board modifications. Selection between 1.5 V and 1.8 V is performed by moving the jumper between the center pin and the respective... -
Page 8: Tlk6002 Evm Global Regulator Margin Selection
The VREFT plane is sourced through a voltage divider providing half of the voltage on the 1p5/8V plane. The VDDQA/B, VDDRA/B, and VDDO1/2/3 power pins of the TLK6002 can be operated off of either 1.5 V or 1.8 V with VREFTA/B being half of whatever voltage is on the VDDQA/B pins which is on the 1p5/8V plane. -
Page 9: Power Monitoring Leds
1P5V AND 1P8V LEDS CONNECTED TO THE VOLTAGE MONITORING CIRCUIT Figure 5. TLK6002 EVM Voltage Monitor LED Enabled Example Placing the jumper on the GND side of the Voltage Monitor Enable/Disable header disconnects the power plane to the input of the voltage monitoring circuit and instead ties the input to GND. This prevents the output of the voltage monitoring circuit from floating and possibly causing the LED to flicker during contact with the board. -
Page 10: Tlk6002 Evm Voltage Monitor Led Disabled Example
1P5V 1P8V LED MONITOR 1P5V AND 1P8V LEDS DISABLED COMPLETELY Figure 7. TLK6002 EVM Voltage Monitor LED Connected Directly to Plane Example TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 11: Control And Output Status Signals
Figure 8. Control Connectors (JMP17, JMP23, JMP26, JMP27, JMP29, JMP33, JMP43) Control Signal and Status Pin Descriptions: PRTAD[4:0]: Port Address. Used to select the Port ID. SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... - Page 12 Each channel can be accessed by setting the appropriate port address field within the serial interface protocol transaction. TLK6002 responds if the four MSBs of the inband PHY address field on MDIO protocol (PA[4:1]) matches PRTAD[4:1]. The LSB of PHY address field (PA[0]) determines which channel/port within TLK6002 to respond to.
- Page 13 If Channel B ARS is not enabled (Rate B = 000/001/010/011/111): Channel A SERDES settings are determined by Channel A MDIO registers. CLK_OUT_P/N is selected by CLK_OUT_SEL. See Table 9 of the TLK6002 data sheet (SLLSE34) for additional details on CLK_OUT_P/N.
- Page 14 0.6), this input signal must be tied low. See Figure 4, “TLK6002 Reference Clock/Output Clock Architecture” of the TLK6002 data sheet (SLLSE34) for more detail. If ARS is enabled, the function of CLK_OUT_SEL is shown in Table 9 of the TLK6002 data sheet.
- Page 15 Similarly, if GPI1 is high, LOSA/B is de-asserted. If unused, this input must be grounded in the device application (not floating). SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback...
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Page 16: Prbs Pass Latch Circuits
PRBS_PASS Latch circuits can quickly indicate whether an error has occurred or not. To properly operate the PRBS_PASS latches, configure the TLK6002 for PRBS operation either by pulling the PRBS_EN line high or through the appropriate MDIO register settings. PRBS data is generated and output on the Serial Transmit and the Serial Receive monitors for valid PRBS data and counts the number of errors received. -
Page 17: Tlk6002 Evm Mdio Connector (Jmp30)
PRBSA PASS PRESSING SW3 LOSA LOSB PRBSB PRBSA LATCH LATCH RESET RESET Figure 9. TLK6002 EVM MDIO Connector (JMP30) SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 18: Mdio
R533 can be removed; thus, disconnecting the level shifters and resistors R469 and R470 can be installed which connects the TLK6002 MDIO and MDC signal pins directly to the pins of JMP30. A third option of using NFETs as level shifters has also been provided, if this option is desired in the end application. -
Page 19: Jtag
JTAG The EVM also provides a separate connector to support the full five-pin JTAG interface of the TLK6002 with onboard level shifters to be compatible with most standard JTAG Control Interfaces to be used for manufacturing tests. Pullup resistors on the 3.3-V (header) side of the level shifter are not installed by TI but can be installed if an open-drain type of controller is used which requires the use of external pullup resistors. -
Page 20: Reset
RESET is pressed. By placing a jumper on JMP15, the Manual Reset (MR) is tied hard to ground causing the TLK6002 to be held in a constant state of Reset without the need to continually hold the Reset Pushbutton SW1. The Supervisory circuit released the Reset line to a HIGH 180 ms (t... -
Page 21: Parallel Signals
These signals are the parallel side input and output clocks per channel. During Parallel Loopback, the clocks can be shorted together as shown in Figure SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 22: Parallel Loopback Example
The extra row of TDA/B can also be used to monitor the signals on the TDA/B pins. Figure 15 shows a clock pattern (01010101010101010101) on TDA[19:0]. TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback... -
Page 23: Peripheral Ports
TLK6002 Reset pin. TI is developing an optical module peripheral board and a clock multiplier and divider peripheral board specifically for use with the TLK6002EVM which will be capable of providing practically any clock frequency needed for operation of the TLK6002 device. -
Page 24: Test And Setup Configurations
The device reset requirements and setup procedure to configure the TLK3132 can be found in the latest version of the TLK6002 data sheet (SLLSE34). Always refer to the latest release of the data sheet for the latest reset, setup, and initialization procedures. -
Page 25: Example Tlk6002 Evm Test Configuration - Parallel Loopback
ALTER Addres POWER PULSE CLOCK SUPPLY GENERATOR COMBO Figure 17. Example TLK6002 EVM Test Configuration – Parallel Loopback SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 26: Tlk6002Evm Schematics
TLK6002EVM Schematics www.ti.com TLK6002EVM Schematics Figure 18. Cover Page and Index, Sheet 1 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 27: Device Power And Ground, Sheet
TLK6002EVM Schematics www.ti.com Figure 19. Device Power and Ground, Sheet 2 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 28: Global Signals, Sheet
TLK6002EVM Schematics www.ti.com Figure 20. Global Signals, Sheet 3 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 29: High-Speed Differential, Sheet
TLK6002EVM Schematics www.ti.com Figure 21. High-Speed Differential, Sheet 4 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 30: Reference And Output Clocks, Sheet
TLK6002EVM Schematics www.ti.com Figure 22. Reference and Output Clocks, Sheet 5 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 31: Jtag, Spi, I2C, Stci, And Mdio, Sheet
TLK6002EVM Schematics www.ti.com Figure 23. JTAG, SPI, I2C, STCI, and MDIO, Sheet 6 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 32: Td And Rd Parallel Data Lines, Sheet
TLK6002EVM Schematics www.ti.com Figure 24. TD and RD Parallel Data Lines, Sheet 7 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 33: Tx/Rx Clocks And A And B Control, Sheet
TLK6002EVM Schematics www.ti.com Figure 25. TX/RX Clocks and A and B Control, Sheet 8 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 34: Prbs Pass/Fail Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 26. PRBS Pass/Fail LEDs, Sheet 9 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 35: 1P0V Power Regulator, Sheet
TLK6002EVM Schematics www.ti.com Figure 27. 1p0V Power Regulator, Sheet 10 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 36: 1P2V Power Regulator, Sheet
TLK6002EVM Schematics www.ti.com Figure 28. 1p2V Power Regulator, Sheet 11 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 37: 1P5V Power Regulator, Sheet
TLK6002EVM Schematics www.ti.com Figure 29. 1p5V Power Regulator, Sheet 12 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 38: 1P8V Power Regulator, Sheet
TLK6002EVM Schematics www.ti.com Figure 30. 1p8V Power Regulator, Sheet 13 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 39: 2P5V Power Regulator, Sheet
TLK6002EVM Schematics www.ti.com Figure 31. 2p5V Power Regulator, Sheet 14 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 40: 3P3V Power Regulator, Sheet
TLK6002EVM Schematics www.ti.com Figure 32. 3p3V Power Regulator, Sheet 15 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 41: Power Regulator Min/Nom/Max Adjustment, Sheet
TLK6002EVM Schematics www.ti.com Figure 33. Power Regulator Min/Nom/Max Adjustment, Sheet 16 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 42: Power Regulator Min/Nom/Max Adjustment Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 34. Power Regulator Min/Nom/Max Adjustment LEDs, Sheet 17 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 43: Power Distribution, Sheet
TLK6002EVM Schematics www.ti.com Figure 35. Power Distribution, Sheet 18 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 44: 1P0V And 1P2V Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 36. 1p0V and 1p2V Supply LEDs, Sheet 19 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 45: 1P5V And 1P8V Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 37. 1p5V and 1p8V Supply LEDs, Sheet 20 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 46: 2P5V, 3P3V, And 5V Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 38. 2p5V, 3p3V, and 5V Supply LEDs, Sheet 21 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 47: Dvdd Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 39. DVDD Supply LEDs, Sheet 22 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 48: 1P5/8V Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 40. 1p5/8V Supply LEDs, Sheet 23 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 49: Vddra Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 41. VDDRA Supply LEDs, Sheet 24 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 50: Vddrb Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 42. VDDRB Supply LEDs, Sheet 25 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 51: Vreft Supply Leds, Sheet
TLK6002EVM Schematics www.ti.com Figure 43. VREFT Supply LEDs, Sheet 26 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 52: No Connect Pins, Sheet
TLK6002EVM Schematics www.ti.com Figure 44. No Connect Pins, Sheet 27 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 53: Peripheral Ports, Sheet
TLK6002EVM Schematics www.ti.com Figure 45. Peripheral Ports, Sheet 28 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 54: Tlk6002Evm Bill Of Materials
1.82K 0402 RES ERJ-2RKF1821X Panasonic - Ecg R142, R148, R155, R162 10.0K 0402 RES RG1005P-103-B-T5 Susumu Co Ltd TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... - Page 55 0603 RES RN731JTTD1961B25 Koa Speer R146, R156, R198, R204, R222, R253, 10.0K 0603 RES ERA-3AEB103V Panasonic - Ecg R355 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated...
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Page 56: Bill Of Materials
R147 3.30K 0603 RES RG1608P-332-B-T5 Susumu Co Ltd R55, R89, R363 3.57K 0603 RES RG1608P-3571-B-T5 Susumu Co Ltd TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... - Page 57 Susumu Co Ltd R176, R177, R178, R179, R181, R185, 0.0 (Zero Ω) 1210 RES RK73Z2ETTE Koa Speer R481 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated...
- Page 58 1 X 2 0.1" HTSW-150-08-G-S Samtec JMP8,JMP15, JMP31, JMP16, JMP24, JMP25, JMP28, JMP21, JMP46, JMP48, JMP50, JMP52, JMP54, JMP147 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated...
- Page 59 R174, R427, R428, R429, R430, R431, 0402 Resistors R501, R518, R548, R550, R528 R530, R531, R532, R533 0402 Resistors SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated...
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Page 60: Tlk6002Evm Board Layouts
TLK6002EVM Board Layouts www.ti.com TLK6002EVM Board Layouts TLK6002 6519192 REV NA Figure 46. Top Signal, Layer 1 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 61: Submit Documentation Feedback Evaluation Module
TLK6002EVM Board Layouts www.ti.com Figure 47. Internal Ground, Layers 2,4,6,8,10 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 62: Internal Power, Layer
TLK6002EVM Board Layouts www.ti.com 1p5/8V (Entire Plane) Figure 48. Internal Power, Layer 3 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 63: Internal Signal, Layer
TLK6002EVM Board Layouts www.ti.com Figure 49. Internal Signal, Layer 5 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 64: Internal Signal, Layer
TLK6002EVM Board Layouts www.ti.com 1p2V 3p3V Figure 50. Internal Signal, Layer 7 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 65: Internal Power, Layer
TLK6002EVM Board Layouts www.ti.com VDDRB VDDRA Figure 51. Internal Power, Layer 9 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 66: Internal Ground And Power, Layers
TLK6002EVM Board Layouts www.ti.com Figure 52. Internal Ground and Power, Layers 11,13,15,17 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 67: Internal Signal, Layer
TLK6002EVM Board Layouts www.ti.com 2p5V Figure 53. Internal Signal, Layer 12 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 68: Internal Signal, Layer
TLK6002EVM Board Layouts www.ti.com 1p2V Figure 54. Internal Signal, Layer 14 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 69: Internal Power, Layer
TLK6002EVM Board Layouts www.ti.com 1p5/8V Header VREFT VDDRA DVDD 2p5V 1p0V 2p5V Figure 55. Internal Power, Layer 16 SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 70: Bottom Signal, Layer
TLK6002EVM Board Layouts www.ti.com Figure 56. Bottom Signal, Layer 18 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver SLLU132 – October 2010 Evaluation Module Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated... -
Page 71: Tlk6002Evm Layer Construction
The end impedance after etching should result in a 50-Ω Impedance. Always consult with your board manufacturer for their process/design requirements to ensure the desired impedance is achieved. SLLU132 – October 2010 TLK6002 Dual-Channel, 0.47-Gbps to 6.25-Gbps, Multi-Rate Transceiver Evaluation Module Submit Documentation Feedback... - Page 72 Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
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Page 73: Important Notice
IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
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