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Control Signals
All of the external control pins on the TLK3134 EVM have been consolidated to a single location
on the board and broken out into several header blocks for easier reference. LEDs have been
added to the GPO[4:0] lines in addition to the headers for scope probes, to allow easy monitoring
of the High/Low value on the line. The LED will be ON when the line is a Logic High, and the
LED will be OFF when the line is a Logic Low.
Figure 8.
Control Connectors (JMP13, JMP15, JMP20, JMP21, JMP25, JMP26)
THE VCO_TL_TST PIN
SHOULD BE TIED TO
GND. A LOCATION FOR
A SERIES INDUCTOR TO
GND HAS BEEN ADDED
SHOULD IT BECOME
THE RESISTORS ON
THIS SIDE OF ALL
HEADER BLOCKS ARE
PULL UP RESISTORS
JUMPER ON THE
PULLUP_EN HEADERS
WILL DISCONNECT THE
PULL UP RESISTORS
FROM THE VOLTAGE
PLANE FOR MORE
ACCURATE CURRENT
MEASUREMENTS
GPO[4:0] LEDS
12
TLK3134 XAUI Transceiver / 4 Channel Multi-Rate Transceiver Evaluation Module (EVM) Users' Guide
SLLU104A - September 2007
NEEDED.
PULLUP_EN
JMP14
PULLUP_EN
REMOVING THE
JMP12
PULLUP_EN
JMP24
D1
R4
GPO0
D2
R15
GPO1
D3
R16
GPO2
D4
R17
GPO3
D5
R24
GPO4
JMP20
GND
VCO_TL_TST
L1
INDUCTOR/GND
JMP21
GND
TST_OUT
JMP15
R39
GPO3
R38
GPO2
R37
GPO1
R36
GPO0
R35
GPI1
JMP26
R55
ST
JMP13
R14
AMUX0
R13
AMUX1
R12
TESTEN
R11
CODE
R10
PRBS_EN
R9
SLOOP
R8
PLOOP
R7
SPEED0
R6
SPEED1
R5
ENABLE
JMP25
R50
PRTAD0
R51
PRTAD1
R52
PRTAD2
R53
PRTAD3
R54
PRTAD4
THE PINS ON THIS SIDE
U3
U4
U5
THE TST_OUT PIN
SHOULD BE LEFT OPEN
IN THE APPLICATION
GPO4 HAS NOT BEEN
CONNECTED TO THIS
HEADER BLOCK BUT
RATHER TO A SMP
CONNECTOR LOCATED
ON THE BOTTOM OF
THE BOARD WITH THE
HIGH SPEED LINES.
LEDS HAVE BEEN
CONNECTED TO EACH
OF THE GP0[4:0] PINS
AND ARE LOCATED
BELOW JMP24 AND
JMP25
OF ALL HEADER
BLOCKS ARE GND
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