Sony BVM-D32E1WA Maintenance Manual page 91

12. Pulse Insertion Circuit
At IC118, the BIAS REF pulse, DRIVE REF pulse, and character pulse are inserted in the R signal. The level of the BIAS REF
pulse is set by the BIAS REF voltage. The level of the DRIVE REF pulse is set by the DRIVE REF voltage.
The same is performed for the B and G signals.
13. Drive Control Amplifier
The levels of the R, G, B signals are limited so that the drive current of the CRT cathode does not exceed the reference value,
and the drive voltage does not exceed its reference value.
The drive current of the CRT cathode is detected by the Q136 collector current. The collector current is clamped by IC132 (2/
2), I/V converted, sampled by IC120 (2/3), and compared with the reference voltage (R DRIVE IK) at IC123 (2/2). When the
drive current exceeds the reference value, the output signal of IC123 (2/2) is input to IC126 (R drive control amplifier) via
IC124 (3/3) to decrease its gain.
The drive voltage of the CRT cathode is detected by the voltage of pin 8 of the R VIDEO OUT amplifier (IC131). The
voltage of pin 8 is clamped by IC127 (1/2), sampled by IC120 (1/3), and compared with the reference voltage (R DRIVE V)
at IC123 (1/2). When the drive voltage exceeds the reference value, the output signal of IC123 (1/2) is input to IC126 (R drive
control amplifier) via IC124 (3/3) to decrease its gain.
The SUB CPU (IC902) sets whether to control the drive rate based on the drive current (current mode) or based on the drive
voltage (voltage mode) (IK/V SW). Normally, the drive control amplifier operates in the voltage mode and uses the current
mode during WB adjustments. The DRIVE COMP is used for the conversion of the DRIVE V data during the voltage mode
and the DRIVE IK data during the current mode.
The same is performed for the B and G signals.
14. Bias Control Circuit
The cathode current detected by IC132 (2/2) is amplified by IC130 (1/2), sampled by IC128 (2/3), and compared with the
reference voltage (R BIAS IK) at IC130 (2/2). The output of IC130 (2/2) controls the DC level of IC129 so that the cathode
current becomes equivalent to the reference voltage.
15. Cut-Off Switch
At IC128 (1/3), the R signal and cut-off voltage (–0.3 Vdc) are switched by the VIDEO TIMING pulse.
The same is performed for the G and B signals.
16. VIDEO OUT Amplifier
IC131 drives the R signal cathode of the CRT.
The same is performed for the G and B signals.
17. G2 Control
The signal with the lowest voltage amongst the G2 R signal, G2 G signal, and G2 B signal is input to IC705 (1/2), compared
with the reference voltage (G2 REF) to become the G2 CONTROL signal, and output from pin 10B of CN1 to the PA board
to control the G2 voltage of the CRT.
18. ABL, Overload Detection
The ABL voltage and reference voltage (–1 Vdc) are compared at IC901 (1/2). Normally, as the ABL voltage is above –1 Vdc,
the output level of IC901 (1/2) is "High". But when the ABL voltage drops to below –1Vdc, CONT and BRT are controlled so
that the ABL voltage becomes –1Vdc (constant). Moreover, as the output level of IC901 (1/2) is lower than the CONTRAST
voltage, the OVERLOAD signal of the output of IC904 (1/2) becomes "High".
19. Control Circuit
The SUB CPU (IC902) performs serial communication with the system controller using the three signals MISO, MOSI, and
SCLK, and outputs the control signal according to the instructions of the system controller. It also reads the adjustment data of
the EEP ROM (IC903) (when setting the data from the BC board to the D/A), and outputs the adjustment voltage from the D/
A converter (IC906 to 911).
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BVM-D32E1WA/D32E1WE/D32E1WU