A Two 8-Bit Eprom System; C.2 Example 1: Building A Hex Command File For Two 8-Bit Eproms - Texas Instruments TMS320C54x User Manual

C.2 Example 1: Building A Hex Command File for Two 8-Bit EPROMs

Figure C–1. A Two 8-Bit EPROM System
Example 1: Building a Command File for Two 8-Bit EPROMS
Example 1 shows how to build the hex command file you need for converting
a COFF object file for the memory system shown in Figure C–1. In this system,
there are two external 64K
processor. Each of the EPROMs contributes 8 bits of a 16-bit word for the tar-
get processor.
CPU
Width 16 Bits
By default, the hex conversion utility uses the linker load address as the base
for generating addresses in the converted output file. However, for this
application, the code will reside at physical EPROM address 0x0010, rather
than the address specified by the linker (0x1400). The circuitry of the target
board handles the translation of this address space. The paddr parameter allo-
cates a section and burns the code at EPROM address 0x0010.
The paddr parameter is specified within the SECTIONS directive (see Section
10.6, The SECTIONS Directive , on page 10-22 for details). If you use the
paddr parameter to specify a load address for one section included in the con-
version, then you must specify a paddr for each section included in the conver-
sion. When setting the paddr parameter, you must ensure that the specified
addresses do not overlap the linker-assigned load addresses of sections that
follow.
In Example 1, two sections are defined: sec1 and sec2. You can easily add a
paddr parameter for each of these sections from within the SECTIONS direc-
tive. However, the task may become unmanageable for large applications with
many sections, or in cases where section sizes may change often during code
development.
8-bit EPROMs interfacing with a 'C54x target
Upper 8 bits
Lower 8 bits
64K 8
ROM0
ROM width
8 bits
EPROM system memory width 16 bits
Hex Conversion Utility Examples
64K 8
ROM1
ROM width
8 bits
C-3